Výsledky vyhledávání

Modeling and extraction technique for parasitic resistances in MOSFETs Combining DC I–V and low frequency C–V measurement

Autor: Hagyoul Bae, Daeyoun Yun, Dae Hwan Kim, Jaeman Jang, Dong Myong Kim, Euiyoun Hong, Jieun Lee, Ja Sun Shin

Publikováno v: Solid-State Electronics. 72:78-81

Accurate extraction of parasitic gate (RG), source (RS), drain (RD), and substrate (Rsub) resistances in MOSFETs is important in the modeling and characterization for DC and RF applications. Combining DC current–voltage and low-frequency capacitanc

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::898e4f84621867c81155a2a24e7f5bad
https://doi.org/10.1016/j.sse.2012.01.007

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Modified Conductance Method for Extraction of Subgap Density of States in a-IGZO Thin-Film Transistors

Autor: Sungwoo Jun, Hyunjun Choi, Dae Hwan Kim, Woojoon Kim, Inseok Hur, Euiyeon Hong, Jaewook Lee, Choon Hyeong Jo, Yun Hyeok Kim, Seonwook Hwang, Dong Myong Kim, Hagyoul Bae, Hyojoon Seo, Daeyoun Yun, Hyun Kwang Jeong

Publikováno v: IEEE Electron Device Letters. 33:1138-1140

We propose a modified conductance method for extraction of the subgap density of states (DOS) in amorphous indium-gallium-zinc oxide thin-film transistors by using the measured capacitance and conductance through the capacitance-voltage (C-V) measure

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::d9574a7778647cf956b3eb8ebf5db3bd
https://doi.org/10.1109/led.2012.2198870

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Subbandgap Optical Differential Body-Factor Technique and Characterization of Interface States in SOI MOSFETs

Autor: Mihee Uhm, Jieun Lee, Won Hee Lee, Euiyoun Hong, Dae Hwan Kim, Hyojoon Seo, Daeyoun Yun, Dong Myong Kim, Jaeman Jang, Hagyoul Bae, Hyunjun Choi

Publikováno v: IEEE Electron Device Letters. 33:922-924

A distribution of interface states (Dit) in SOI MOSFETs has been characterized by a subbandgap optical differential body-factor (SODBoF) technique. We adopted a subbandgap (Eph

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::14eb1d8e9422fb049c68d2de45ea1f1f
https://doi.org/10.1109/led.2012.2194981

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Hybrid $C$– $V$ and $I$ –$V$ Technique for Separate Extraction of Structure- and Bias-Dependent Parasitic Resistances in a-InGaZnO TFTs

Autor: Mihee Uhm, Euiyoun Hong, Mun-Soo Park, Sunwoong Choi, Dong Myong Kim, Ja Sun Shin, Hagyoul Bae, Won Hee Lee, Daeyoun Yun, Dae Hwan Kim, Inseok Hur, Keum-Dong Jung

Publikováno v: IEEE Electron Device Letters. 33:534-536

We report a hybrid technique for extraction of structure- and gate-bias-dependent parasitic source/drain (S/D) resistances (RS and RD) in amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). In the proposed technique, C- V and I

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::906c1dd128f67d66a05b4f31e366d761
https://doi.org/10.1109/led.2012.2182752

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Vertical-Gate Si/SiGe Double-HBT-Based Capacitorless 1T DRAM Cell for Extended Retention Time at Low Latch Voltage

Autor: Jaeman Jang, Ja Sun Shin, Hyunjun Choi, Daeyoun Yun, Dong Myong Kim, Euiyoun Hong, Dae Hwan Kim, Hagyoul Bae

Publikováno v: IEEE Electron Device Letters. 33:134-136

A vertical-gate Si/SiGe double heterojunction bipolar transistor (VerDHBT)-based capacitorless 1T DRAM cell is proposed for improved storage performance with a fabrication feasibility through a selective epitaxy. It is verified through a TCAD device

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::94ac564c1a286c5392798d0cace9fa5e
https://doi.org/10.1109/led.2011.2174025

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Differential Body-Factor Technique for Characterization of Interface Traps in MOSFETs

Autor: Daeyoun Yun, Euiyeon Hong, Minkyung Bae, Dong Myong Kim, Ja Sun Shin, Jaeman Jang, Dae Hwan Kim, Jieun Lee, Hagyoul Bae

Publikováno v: IEEE Electron Device Letters. 32:1206-1208

A differential body-factor technique (DBT) is proposed for characterization of interface traps in MOSFETs employing the differential body factor dm/dVGS instead of the subthreshold slope or the body factor itself. The DBT is independent of the thresh

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::22ae1de9be255649904ac323b26a5c0c
https://doi.org/10.1109/led.2011.2160709

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A Novel Double HBT-Based Capacitorless 1T DRAM Cell With Si/SiGe Heterojunctions

Autor: Daeyoun Yun, Jieun Lee, Hagyoul Bae, Euiyoun Hong, Dong Myong Kim, Jaeman Jang, Ja Sun Shin, Dae Hwan Kim

Publikováno v: IEEE Electron Device Letters. 32:850-852

We propose a novel double heterojunction bipolar transistor (DHBT)-based capacitorless one-transistor (1T) DRAM cell employing a narrow bandgap SiGe body and Si/SiGe heterojunction for a possible next-generation DRAM cell. It has a body with a narrow

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::96b7adb341d39617a8577a19b2b151be
https://doi.org/10.1109/led.2011.2142390

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Modeling and Separate Extraction of Gate-Bias- and Channel-Length-Dependent Intrinsic and Extrinsic Source–Drain Resistances in MOSFETs

Autor: Hagyoul Bae, Jieun Lee, Tae Wan Kim, Ja Sun Shin, Dae Hwan Kim, Jaeman Jang, Dong Myong Kim, Daeyoun Yun

Publikováno v: IEEE Electron Device Letters. 32:722-724

A new technique for a separate extraction of the current-path-dependent resistance (RSD0) from the contact-dependent source and drain resistances (RSe and RDe) is reported for a single MOSFET. We also report a technique for a separation of VGS-depend

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::ac4d8f594a0b86f92f68d04f000783af
https://doi.org/10.1109/led.2011.2131116

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Separate Extraction of Source, Drain, and Substrate Resistances in MOSFETs With Parasitic Junction Current Method

Autor: Hyojong Kim, Ja Sun Shin, Seok Cheon Baek, Jaeman Jang, Dong Myong Kim, Dae Hwan Kim, Sunyeong Lee, Hagyoul Bae, Daeyoun Yun

Publikováno v: IEEE Electron Device Letters.

The separate extraction of asymmetric source (RS) and drain (RD) resistances caused by the variations in the layout, process, and device degradation is important in the practical modeling and characterization of MOSFETs and their integrated circuits.

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::911d5fd5ec202a41a8e898882eea9ca2
https://doi.org/10.1109/led.2010.2066257

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A narrow bandgap SiGe channel superlattice bandgap engineered 1T DRAM cell for low voltage operation and extended hole retention time

Autor: Dae Hwan Kim, Jieun Lee, Hagyoul Bae, Dong Myong Kim, Daeyoun Yun, Jaeman Jang, Ja Sun Shin

Publikováno v: Semiconductor Science and Technology. 26:095025

We propose a SiGe channel superlattice bandgap engineered (SiGe SBE) 1-transistor dynamic random access memory (1T DRAM) cell structure for improved generation and extended retention of hot holes adopting a narrow bandgap Si0.8Ge0.2 channel even with

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::24bc1595ace097cb25c41b5ad62a65fb
https://doi.org/10.1088/0268-1242/26/9/095025

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