Zobrazeno 1 - 10
of 25
pro vyhledávání: '"Dae-Chul Ahn"'
Autor:
Seong-Yeon Kim, Dae-Hwan Yun, Wu-Kang Kim, Dae-Chul Ahn, Jun-Young Park, Myung-Su Kim, Myungsoo Seo, Yang-Kyu Choi
Publikováno v:
IEEE Electron Device Letters. 40:196-199
An erasing method capable of speeds 104-fold faster compared with those by the conventional Fowler–Nordheim (FN) erasing technique is experimentally demonstrated in a gate-all-around junctionless (JL) charge-trap flash memory device using thermal e
Autor:
Jun-Young Park, Jae Hur, Yang-Kyu Choi, Choong-Ki Kim, Chang-Hoon Jeon, Tewook Bang, Seong-Wan Ryu, Seyeob Kim, Yun-Ik Son, Dae-Chul Ahn, Yong-Taik Kim, Gun-Hee Kim, Hagyoul Bae, Jae-Hoon Lee
Publikováno v:
Journal of Nanoscience and Nanotechnology. 17:3247-3250
Autor:
Seung-Bae Jeon, Choong-Ki Kim, Byung-Hyun Lee, Jae-Sub Oh, Dae-Chul Ahn, Minho Kang, Yang-Kyu Choi, Tewook Bang
Publikováno v:
IEEE Electron Device Letters. 38:40-43
Low-frequency (LF) noise in a vertically stacked nanowire (VS-NW) memory device, which is based on the silicon–oxide–nitride–oxide–silicon (SONOS) configuration is characterized in two different operational modes, an inversion-mode and a junc
Publikováno v:
ECS Journal of Solid State Science and Technology. 6:Q1-Q5
Autor:
Byung-Hyun Lee, Yang-Kyu Choi, Jae Hur, Tewook Bang, Dae-Chul Ahn, Seung-Bae Jeon, Minho Kang
Publikováno v:
IEEE Electron Device Letters. 37:541-544
A comprehensive analysis of the gate-induced drain leakage (GIDL) current of vertically stacked nanowire (VS-NW) FETs was carried out. In particular, two different operational modes of the VS-NW, an inversion mode (IM) and a junctionless mode (JM), w
Autor:
Yang-Kyu Choi, Byung-Hyun Lee, Jun-Young Park, Dong-Il Moon, Myeong-Lok Seol, Jae Hur, Jin-Woo Han, Dae-Chul Ahn, Seung-Bae Jeon
Publikováno v:
IEEE Electron Device Letters. 37:190-192
An ultra-fast erasing process that acts within 200 ns is demonstrated in a junctionless gate-all-around nanowire silicon-oxide–nitride-oxide–silicon device. Rapid erasing is enabled with the use of instantaneous thermal excitation (TE) through a
Publikováno v:
2017 IEEE 30th International Conference on Micro Electro Mechanical Systems (MEMS).
A silicon-nanowire (Si-NW) switch with triboelectricity is proposed for the first time for future electronics with enhanced security application. The dimensions of the mechanical NW switch are width 50 nm and thickness 100 nm with a 50-nm-thick airga
Autor:
Kwang-Hee Kim, Yang-Kyu Choi, Myung-Su Kim, Jinsu Yoon, Dongil Lee, Meehyun Lim, Jae Hur, Jun-Young Park, Seung-Bae Jeon, Sung-Jin Choi, Minho Kang, Byung-Hyun Lee, Dae-Chul Ahn
Publikováno v:
ACS nano. 10(12)
Three-dimensional (3-D) fin-structured carbon nanotube field-effect transistors (CNT-FETs) with purified 99.9% semiconducting CNTs were demonstrated on a large scale 8 in. silicon wafer. The fabricated 3-D CNT-FETs take advantage of the 3-D geometry
Autor:
Sang-Jae Park, Daewon Kim, Jun-Young Park, Choong-Ki Kim, Yang-Kyu Choi, Myeong-Lok Seol, Seung-Bae Jeon, Jin-Woo Han, Dongil Lee, Hagyoul Bae, Dae-Chul Ahn, Byung-Hyun Lee
Publikováno v:
Scientific Reports
SCIENTIFIC REPORTS(6)
SCIENTIFIC REPORTS(6)
We report the transient memory device by means of a water soluble SSG (solid sodium with glycerine) paper. This material has a hydroscopic property hence it can be soluble in water. In terms of physical security of memory devices, prompt abrogation o
Autor:
Byung-Hyun Lee, Minho Kang, Jun-Young Park, Sung-Jin Choi, Dongil Lee, Seung-Bae Jeon, Dae-Chul Ahn, Yang-Kyu Choi, Byung Jin Cho, Bongsik Choi, Myeong-Lok Seol, Hyun Jun Ahn, Choong-Ki Kim, Jinsu Yoon, Byeong-Woon Hwang
Publikováno v:
2016 IEEE International Electron Devices Meeting (IEDM).
Fully wrap-gated carbon nanotube (CNT) transistors with vertically suspended (VS) semiconducting single-walled CNTs, purified up to 99.9%, are demonstrated for the first time. Without a sacrifice of scalability, remarkably enhanced gate controllabili