Zobrazeno 1 - 10
of 54
pro vyhledávání: '"D.S. Bang"'
Publikováno v:
1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095).
With the ever decreasing transistor feature sizes, scaling of interconnect has caused many new challenges in fabrication technology. Three-dimensional (3D) geometrical effects due to mechanical stress and electrical charge on short-length or sharp-co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::55f11dd39597c2bcb631293732fc52b3
https://doi.org/10.1109/sispad.1996.865279
https://doi.org/10.1109/sispad.1996.865279
Autor:
T.I. Kim, D.S. Bang, Sin-Doo Lee, J.S. Yu, Seungryong Cho, Y.K. Oh, Namhoon Kim, A.G. Choo, J.S. Ma, H.C. Ha
Publikováno v:
Technical Digest. CLEO/Pacific Rim '99. Pacific Rim Conference on Lasers and Electro-Optics (Cat. No.99TH8464).
High speed and low chirp light sources are among the most essential components in long distance multigigabit optical communication systems. InGaAsP-InGaAsP electroabsorption (EA) modulator integrated DFB-LDs (EMILD) have attracted special interest be
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8a831ab9dfafec2eff9a047121b03248
https://doi.org/10.1109/cleopr.1999.817896
https://doi.org/10.1109/cleopr.1999.817896
Publikováno v:
Proceedings of 1994 IEEE International Electron Devices Meeting.
A physical vapor deposition (PVD) system configuration is proposed which consists of three concentric sputter targets which are independently controlled in real time. A "virtual reactor" which models this PVD configuration at the macroscopic equipmen
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6f856211d6f9274fb7f4b8350a879f51
https://doi.org/10.1109/iedm.1994.383348
https://doi.org/10.1109/iedm.1994.383348
Autor:
Krishna C. Saraswat, M. M. IslamRaja, D.S. Bang, James P. McVittie, Zoran Krivokapic, R. Cheung
Publikováno v:
Proceedings of International Workshop on Numerical Modeling of processes and Devices for Integrated Circuits: NUPAD V.
A novel model for simulating Physical Vapor Deposition (PVD) systems is presented. The model determines profile evolution for deposition in trenches and vias by considering the major components in a PVD system. The simulator incorporates the effects
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a39ca0cc997fc811e3be87b433a77d30
https://doi.org/10.1109/nupad.1994.343495
https://doi.org/10.1109/nupad.1994.343495
Autor:
Y.L. Cho, J.R. Kim, B. C. Rose, R.A. Stall, S.H. Lee, J.Y. Kim, D.S. Bang, M.A. McKee, J.H. Lee, Y.H. Inn
Publikováno v:
[Proceedings 1991] Third International Conference Indium Phosphide and Related Materials.
High-quality In/sub 0.5/Ga/sub 0.5/P and InGaAlP layers have been grown by low-pressure metalorganic vapor-phase epitaxy (MOVPE) in a vertical, high-speed rotating-disk reactor. The three most important areas of uniformity investigated were thickness
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9fc197a23a57d8f8e142d99452dee1f1
https://doi.org/10.1109/iciprm.1991.147412
https://doi.org/10.1109/iciprm.1991.147412
Publikováno v:
1998 3rd International Symposium on Plasma Process-Induced Damage (Cat. No.98EX100).
The effect of using a Cu damascene process on plasma process-induced damage (PPID) is studied in relationship to future scaling rules. Wafers processed using a Cu damascene metallization scheme show little increase in gate leakage as antenna ratios a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1229668e846b43ef9b9112b660c29bac
https://doi.org/10.1109/ppid.1998.725575
https://doi.org/10.1109/ppid.1998.725575
Autor:
Krishna C. Saraswat, D.S. Bang, J. Gray, Zoran Krivokapic, James P. McVittie, John A. Iacoponi
Publikováno v:
Proceedings of International Electron Devices Meeting.
A three dimensional Physical Vapor Deposition (PVD) virtual reactor is presented which uses 3-d particle flux data generated by equipment level models in order to simulate 3-d metal film profiles for VLSI scale features. A calibration methodology whi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::89b0e2e6b575fde4a791521057a077a4
https://doi.org/10.1109/iedm.1995.497191
https://doi.org/10.1109/iedm.1995.497191
Conference
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Autor:
Krishna C. Saraswat, Karl A. Littau, Z. Krivokapic, D.S. Bang, James P. McVittie, J. Gray, John A. Iacoponi
Publikováno v:
MRS Proceedings. 389
TiN PVD and CVD models have been incorporated in the SPEEDIE topography simulator. A parameter extraction methodology is presented which allows engineers to locally calibrate their process to the SPEEDIE simulator. The calibration requires no special
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::09e9360c703b2ba120f15717aba13021
https://doi.org/10.1557/proc-389-173
https://doi.org/10.1557/proc-389-173
Publikováno v:
Simulation of Semiconductor Devices and Processes ISBN: 9783709173633
A three dimensional sputter deposition simulator based upon the SPEEDIE topography simulator is presented. The simulator combines equipment models with topography evolution models in order to predict topography for VLSI metallization. Equipment scale
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::31edb82b7a63d9bb1e3cb3ca7e7c3403
https://doi.org/10.1007/978-3-7091-6619-2_39
https://doi.org/10.1007/978-3-7091-6619-2_39
