Zobrazeno 1 - 10
of 37
pro vyhledávání: '"D.L. Dietmeyer"'
Autor:
D.L. Dietmeyer, Feng Wang
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 17:772-781
Effective algorithms exist for synthesizing symmetric functions and for "ordinary" nonsymmetric functions. However, the existing methods have difficulties when the functions are not symmetric but are "close" to being symmetric. We formulate a set of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::37ba62977b39a6bd8cd1a9baf360d63b
https://doi.org/10.1109/43.720314
https://doi.org/10.1109/43.720314
Autor:
D.L. Dietmeyer
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 12:710-713
An algorithm is offered for generating minimum-cost, two-level expressions for totally symmetric, complete switching functions. The algorithms discussed were programmed in TurboPascal (and TurboC) and executed on an IBM PS/2-80. Many symmetric switch
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e8b91e5a76cefcebc778411cc19a452c
https://doi.org/10.1109/43.277615
https://doi.org/10.1109/43.277615
Autor:
Y. Chu, F.J. Hill, D.L. Dietmeyer, B. Johnson, G. Ordy, C.W. Rose, M. Roberts, J.R. Duley, M.R. Barbacci
Publikováno v:
IEEE Design & Test of Computers. 9:69-81
Current hardware description languages (HDLs) benefit from the efforts of designers of hardware description languages dating back to the mid 1960s. The developers of six HDLs discuss their motivations and their views of how their work relates to the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a161315ae326bccf3e55cf23e36108aa
https://doi.org/10.1109/54.143147
https://doi.org/10.1109/54.143147
Autor:
D.L. Dietmeyer, Bo-Gwan Kim
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 11:142-157
The authors offer extended algebraic operations and strategies for se in algebraic approaches. A novel cube/array representation that directly shows some legal expressional variations from a minimal expression written in the conventional three symbol
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::52801a3816ab4539e7062e9b6004a629
https://doi.org/10.1109/43.124395
https://doi.org/10.1109/43.124395
Autor:
B.-G. Kim, D.L. Dietmeyer
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 10:436-446
Designs of totally symmetric functions provided by logic synthesis systems have on average more than twice as many literals as best designs, while the designs of nonsymmetric functions have on average 20% more literals. A simple, but effective, heuri
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ecd2f8867a1bf80c54a8a12de8f1edd7
https://doi.org/10.1109/43.75627
https://doi.org/10.1109/43.75627
Autor:
D.L. Dietmeyer
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 6:892-902
Wislan is a language for describing computer hardware at the gate and functional levels of abstraction. After converting a WISLAN description to a gate table data structure, users interactively apply local transformations to that network to transform
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::16c823f48da6e8bed23080b23cb1cb91
https://doi.org/10.1109/tcad.1987.1270332
https://doi.org/10.1109/tcad.1987.1270332
Autor:
R.R. Hackbart, D.L. Dietmeyer
Publikováno v:
IEEE Transactions on Computers. :184-189
Armstrong et al.[1] have shown how critical races and function hazards can be suppressed in asynchronous sequential circuits by using gate delays to advantage rather than introducing explicit delay elements, if certain delay assumptions are satisfied
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4b4b53eccfe205e2db6d54028586ea71
https://doi.org/10.1109/t-c.1971.223209
https://doi.org/10.1109/t-c.1971.223209
Autor:
D.L. Dietmeyer, J.R. Duley
Publikováno v:
IEEE Transactions on Computers. :850-861
—Successful design and manufacture of future digital systems will depend upon the availability of a suitable design language. A precise, concise language is presented which facilitates the specification of complex digital systems. The language 1) i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::080f867e16094bfcf411deeec4a19836
https://doi.org/10.1109/tc.1968.229145
https://doi.org/10.1109/tc.1968.229145
Autor:
D.L. Dietmeyer, Yueh-Hsung Su
Publikováno v:
IEEE Transactions on Computers. :58-63
An algorithm which reduces the number of gates and connections (diodes) in two-level, multiple-output combinational logic networks is presented and compared with conventional minimization procedures.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::20567a789274bcb8b85f22474a4aa232
https://doi.org/10.1109/t-c.1969.222525
https://doi.org/10.1109/t-c.1969.222525
Autor:
D.L. Dietmeyer, Yueh-Hsung Su
Publikováno v:
IEEE Transactions on Computers. :11-22
Factoring techniques are incorporated in computer-oriented algorithms for the synthesis of fan-in limited NAND switching networks. Tree networks with reduced gate count or levels of logic are sought. While example FORTRAN programs emphasize computer
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8b98338989818eac89858eadaad68ddb
https://doi.org/10.1109/t-c.1969.222521
https://doi.org/10.1109/t-c.1969.222521