Zobrazeno 1 - 10
of 171
pro vyhledávání: '"D.D. Gajski"'
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 13:439-450
We propose a transformation-based scheduling algorithm for the problem given a loop construct, a target initiation interval and a set of resource constraints, schedule the loop in a pipelined fashion such that the iteration time of executing an itera
Autor:
D.D. Gajski, L. Ramachandran
Publikováno v:
IEEE Design & Test of Computers. 11:44-54
Publikováno v:
DAC
As of 2010, over 30 of the world's top semiconductor / systems companies have adopted HLS. In 2009, SOCs tape-outs containing IPs developed using HLS exceeded 50 for the first time. Now that the practicality and value of HLS is established, engineers
Autor:
D.D. Gajski
Publikováno v:
Proceedings of the 47th Design Automation Conference.
Publikováno v:
IEEE Design & Test of Computers. 9:6-13
The SpecCharts language, which builds on VHDL to meet the unique requirements of system-level specification and design, is described. With an underlying model of behavioral hierarchy, SpecCharts modeling constructs enable designers to capture system
Autor:
Nikil Dutt, D.D. Gajski
Publikováno v:
IEEE Design & Test of Computers. 7:8-23
An overview is given of silicon compilation, which involves translating a high-level design description into layout. Levels of compilers are differentiated, and compilation is shown as a process of synthesis coupled with physical design at each level
Autor:
D.D. Gajski
Publikováno v:
2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era.
With complexities of systems-on-chip (SOCs) rising almost daily, the design community has been searching for a new methodology that can handle given complexities with increased productivity and decreased time-to-market. The obvious solution that come
Autor:
S. Bakshi, D.D. Gajski
Publikováno v:
Proceedings of the 34th Design Automation Conference.
Publikováno v:
ECBS
The paper describes a visual design authoring tool named VisualSpec. VisualSpec realizes a homogeneous hardware/software codesign process which means to perform both functional specification design and architectural specification design of HW/SW part
Publikováno v:
Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..