Zobrazeno 1 - 10
of 12
pro vyhledávání: '"D. Jadus"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 32:1455-1459
The behavior of on-chip, planar, spiral inductors fabricated over a conductive silicon substrate has been characterized over the temperature range from -55/spl deg/C to +125/spl deg/C. Quality factor (Q) was observed to decrease with increasing tempe
Publikováno v:
Proceedings of the 1999 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.99CH37024).
Design tradeoffs for the optimization of inductor Q have been analyzed, and thick metallization has been identified as the most promising technology enhancement. Peak Qs approaching 19 have been demonstrated using thick metal.
Publikováno v:
Proceedings of the 1996 BIPOLAR/BiCMOS Circuits and Technology Meeting.
Minimizing R/sub bb/, C/sub ca/, and C/sub cb/ is crucial to maximizing the key figure of merit f/sub max/ in the SiGe HBT. Through a systematic scaling study of the extrinsic base-emitter sidewall spacer, we explore for the first time the trade-off
Publikováno v:
Proceedings of the 1996 BIPOLAR/BiCMOS Circuits and Technology Meeting.
The behavior of on-chip planar inductors fabricated over a conductive silicon substrate has been characterized over the temperature range from -55/spl deg/C to 125/spl deg/C for the first time. Q was observed to decrease with increasing temperature o
Autor:
B. Ebersman, G.D. Berg, David Harame, D. Jadus, Robert A. Groves, Keith M. Walter, D.A. Sunderland, Gregory G. Freeman
Publikováno v:
Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting.
A scaleable, statistical model has been developed for SiGe HBTs. SPICE Gummel-Poon model parameters are scaled, and statistics added, using language features built into HSPICE. DC and AC fit is good over a wide range in emitter sizes. Features of IBM
Autor:
David C. Ahlgren, Gregory G. Freeman, Robert A. Groves, Jack O. Chu, Ryan Wayne Wuthrich, Kathryn T. Schonenberg, Z.X. He, Basanth Jagannathan, Peter J. Geiss, J. Malinowski, Louis D. Lanzerotti, Bradley A. Orner, J. Dunn, S. Subbanna, Mounir Meghelli, H. Chen, David Harame, Xuefeng Liu, K. Watson, Michael J. Zierak, Douglas D. Coolbaugh, Jeffrey B. Johnson, Vidhya Ramachandran, Peter B. Gray, R. Johnson, D. Jadus, Alvin J. Joseph, Alexander V. Rylyakov
Publikováno v:
Proceedings of the 2001 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.01CH37212).
A BiCMOS technology is presented that integrates a high performance NPN (f/sub T/=120 GHz and f/sub max/=100 GHz), ASIC compatible 0.11 /spl mu/m L/sub eff/ CMOS, and a full suite of passive elements. Significant HBT performance enhancement compared
Publikováno v:
Scopus-Elsevier
Based on measurements of inductors fabricated in the IBM SiGe process with different add-on process modules, a Moments EM field simulator is used to predict inductor performance in the entire process space of different fabrication techniques, which a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dd299980686462641bc22d68a4470b73
http://www.scopus.com/inward/record.url?eid=2-s2.0-0037480729&partnerID=MN8TOARS
http://www.scopus.com/inward/record.url?eid=2-s2.0-0037480729&partnerID=MN8TOARS
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