Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Computer science and engineering::Hardware [Engineering]"'
Autor:
Li, Shiqing, Liu, Weichen
The Gustavson’s algorithm (i.e., the row-wise product algorithm) shows its potential as the backbone algorithm for sparse matrix-matrix multiplication (SpMM) on hardware accelerators. However, it still suffers from irregular memory accesses and thu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______1392::e1ffb32af47dc5f9ab65fef62828a0d6
https://hdl.handle.net/10356/167477
https://hdl.handle.net/10356/167477
Publikováno v:
Electronics; Volume 11; Issue 18; Pages: 2868
Digital image blending is commonly used in applications such as photo editing and computer graphics where two images are combined to produce a desired blended image. Digital images can be blended by addition or multiplication, and usually exact addit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::23ab30467f5512c562c2d66040adea43
Autor:
Weng-Geng Ho, Jun-Sheng Ng, Juncheng Chen, Joseph S. Chang, Bah-Hwee Gwee, Nay Aung Kyaw, Ne Kyaw Zwa Lwin, Kwen-Siong Chong
Publikováno v:
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 11:343-356
We present a side-channel-attack (SCA) resistant asynchronous-logic (async-logic) Advanced Encryption Standard (AES) accelerator with dual-hiding SCA countermeasures, i.e. the amplitude moderation (vertical dimension) and the time moderation (horizon
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ee9c18e62997b0716e128d16cd2fe7a9
https://doi.org/10.1109/jetcas.2021.3077887
https://doi.org/10.1109/jetcas.2021.3077887
Publikováno v:
IEEE Transactions on Computers
IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2020, 69 (5), pp.633-648. ⟨10.1109/TC.2019.2958611⟩
IEEE Transactions on Computers, 2020, 69 (5), pp.633-648. ⟨10.1109/TC.2019.2958611⟩
IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2020, 69 (5), pp.633-648. ⟨10.1109/TC.2019.2958611⟩
IEEE Transactions on Computers, 2020, 69 (5), pp.633-648. ⟨10.1109/TC.2019.2958611⟩
International audience; In recent years, performance counters have been used as a side channel source to monitor branch mispredictions, in order to attack cryptographic algorithms. However, the literature considers blinding techniques as effective co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5e5b699ade85190ef2dd081bd710f909
https://doi.org/10.1109/tc.2019.2958611
https://doi.org/10.1109/tc.2019.2958611
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. :1-1
Sparse matrix-vector multiplication (SpMV) on FPGAs has gained much attention. The performance of SpMV is mainly determined by the number of multiplications between non-zero matrix elements and the corresponding vector values per cycle. On the one si
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a5fa7e9869c54b21eb235b407af75e1a
https://doi.org/10.1109/tcad.2023.3281715
https://doi.org/10.1109/tcad.2023.3281715
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. :1-1
Sparse-matrix sparse-matrix multiplication (SpMM) is an important kernel in multiple areas, e.g., data analytics and machine learning. Due to the low on-chip memory requirement, the consistent data format, and the simplified control logic, the Gustav
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fb738138c513d6fed55a0ff3a611531e
https://doi.org/10.1109/tcad.2023.3281719
https://doi.org/10.1109/tcad.2023.3281719
Autor:
Juncheng Chen, Weng-Geng Ho, Zhiping Lin, Kwen-Siong Chong, Jun-Sheng Ng, Nay Aung Kyaw, Ne Kyaw Zwa Lwin, Joseph S. Chang, Bah-Hwee Gwee
Publikováno v:
ISCAS
The attack efficacy of Differential Power Analysis (DPA), a popular side channel evaluation technique for key extraction, is compromised by the false highest Difference Of Means (DOMs) value (‘ghost peaks’) in the DOMs matrix produced in a conven
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e43c7d18e5b1ee65ece691034fae77ce
https://doi.org/10.1109/iscas51556.2021.9401487
https://doi.org/10.1109/iscas51556.2021.9401487
Publikováno v:
Electronics, Vol 10, Iss 630, p 630 (2021)
Electronics
Volume 10
Issue 5
Electronics
Volume 10
Issue 5
This article describes the design of approximate array multipliers by making vertical or horizontal cuts in an accurate array multiplier followed by different input and output assignments within the multiplier. We consider a digital image denoising a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4fa387e3e33562e5f26a2770f9ebd45f
https://www.mdpi.com/2079-9292/10/5/630
https://www.mdpi.com/2079-9292/10/5/630
Publikováno v:
PLoS ONE
PLoS ONE, Vol 15, Iss 9, p e0239395 (2020)
PLoS ONE, Vol 15, Iss 9, p e0239395 (2020)
Electronic circuits and systems employed in mission- and safety-critical applications such as space, aerospace, nuclear plants etc. tend to suffer from multiple faults due to radiation and other harsh external phenomena. To overcome single or multipl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::caf6e5e0219d7b4878526e3b8593f775
http://europepmc.org/articles/PMC7508396
http://europepmc.org/articles/PMC7508396
Publikováno v:
PLoS ONE, Vol 15, Iss 2, p e0228343 (2020)
PLoS ONE
PLoS ONE
Multiplication is a widely used arithmetic operation that is frequently encountered in micro-processing and digital signal processing. Multiplication is implemented using a multiplier, and recently, QDI asynchronous array multipliers were presented i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ecfc7095380d65ce4a54398887149de7
https://doaj.org/article/42038578a5db4f69bc409473251dfdc1
https://doaj.org/article/42038578a5db4f69bc409473251dfdc1