Zobrazeno 1 - 10
of 2 150
pro vyhledávání: '"Cmos digital circuits"'
Autor:
Masakazu Shoji
CMOS chips are becoming increasingly important in computer circuitry. They have been widely used during the past decade, and they will continue to grow in popularity in those application areas that demand high performance. Challenging the prevailing
Autor:
Szczesniak, Wladyslaw
Publikováno v:
Dans 13th International Worshop on THERMal INvestigations of ICs and Systems - THERMINIC 2007, Budapest : Hongrie (2007)
This paper presents a BPD (Balanced Power Dissipation) heuristic scheduling algorithm applied to VLSI CMOS digital circuits/systems in order to reduce the global computational demand and provide balanced power dissipation of computational units of th
Externí odkaz:
http://arxiv.org/abs/0801.1029
Publikováno v:
In Microelectronics Journal December 2015 46(12) Part A:1313-1324
Autor:
Vijay Kumar Sharma
Publikováno v:
Australian Journal of Electrical and Electronics Engineering. 18:217-236
The battery-driven portable systems are the lifeline of the modern era. Very large-scale integration (VLSI) designers are continuously working to enhance the performance of the portable systems. Th...
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ed419d559f9327eb238a092457a43525
https://doi.org/10.1080/1448837x.2021.1966957
https://doi.org/10.1080/1448837x.2021.1966957
Akademický článek
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Autor:
Shruti Kalra, A.B. Bhattacharyya
Publikováno v:
Journal of Integrated Circuits and Systems. 11:57-68
Aggressive technological scaling continues to drive ultra-large-scale-integrated chips to higher clock speed. This causes large power consumption leading to considerable thermal generation and on-chip temperature gradient. Though much of the research
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5c08dc6dd77c3973e5214c48b3841484
https://doi.org/10.29292/jics.v11i1.430
https://doi.org/10.29292/jics.v11i1.430
Publikováno v:
2023 IEEE Custom Integrated Circuits Conference (CICC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8851284fb689250e7c3a30bc16c12889
https://doi.org/10.1109/cicc57935.2023.10121240
https://doi.org/10.1109/cicc57935.2023.10121240
Autor:
Butzen, Paulo F., da Rosa, Leomar S., Jr, Chiappetta Filho, Erasmo J.D., Reis, André I., Ribas, Renato P.
Publikováno v:
In Microelectronics Journal April 2010 41(4):247-255
Publikováno v:
TSP
This paper presents the power&area aware modeling approach of CMOS digital circuits and PAELib, its VHDL implementation. Today’s low-power and high power density designs justify the necessity of power and area estimates in early digital design stag
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8a84f4725aec394d64e308005a4bd2a0
https://doi.org/10.1109/tsp49548.2020.9163455
https://doi.org/10.1109/tsp49548.2020.9163455