Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Clement Pribat"'
Autor:
Olivier Gourhant, Pascal Masson, Franck Julien, Jerome Goy, Giada Ghezzi, Jean-Luc Ogier, Thibault Kempf, Dann Morillon, Clement Pribat, Alexandre Villaret, N. Cherault, Stephan Niel, Philippe Lorenzini
Publikováno v:
2018 International Integrated Reliability Workshop (IIRW).
In this paper, the reliability of thick SiO 2 gate oxides is assessed using quasi-static and multi-frequency capacitance measurements after constant current stress. A comprehensive study of oxide wear-out is presented, highlighting trapping mechanism
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::28a688c95ccd71cf239092391ae754d5
https://doi.org/10.1109/iirw.2018.8727082
https://doi.org/10.1109/iirw.2018.8727082
Autor:
Alexandre Villaret, Thibault Kempf, Dann Morillon, Jean-Luc Ogier, Giada Ghezzi, N. Cherault, Julien Delalleau, Franck Julien, Pascal Masson, Jerome Goy, Clement Pribat, Olivier Gourhant, Jean-Christophe Grenier, Stephan Niel
Publikováno v:
2017 IEEE International Integrated Reliability Workshop (IIRW).
Targeting the integration of embedded non-volatile memories on thin-silicon body technology, high temperature oxide (HTO) is evaluated on a 40nm automotive eFlash process as replacement of furnace grown thick gate oxide for high voltage transistors.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::778ada43580ff7d4a24aaf81c3b444df
https://doi.org/10.1109/iirw.2017.8361239
https://doi.org/10.1109/iirw.2017.8361239
Autor:
Olivier Gourhant, Marc Juhel, Romain Duru, Clement Pribat, François Bertin, F. Abbate, Fabien Rozé, Elisabeth Blanquet
Publikováno v:
Journal of Applied Physics
Journal of Applied Physics, American Institute of Physics, 2017, 121 (24), ⟨10.1063/1.4987040⟩
Journal of Applied Physics, 2017, 121 (24), ⟨10.1063/1.4987040⟩
Journal of Applied Physics, American Institute of Physics, 2017, 121 (24), ⟨10.1063/1.4987040⟩
Journal of Applied Physics, 2017, 121 (24), ⟨10.1063/1.4987040⟩
International audience; The fabrication of ultrathin compressively strained SiGe-On-Insulator layers by the condensation technique is likely a key milestone towards low-power and high performances FD-SOI logic devices. However, the SiGe condensation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e59be2b1ad08a21abf8b6c87323d608b
https://hal.archives-ouvertes.fr/hal-01914053
https://hal.archives-ouvertes.fr/hal-01914053
Autor:
F. Abbate, E Baylac, Clement Pribat, D. Barge, Marc Juhel, C. Gaumer, A. Pofelski, Vincent Mazzocchi, Germain Serventon, Olivier Gourhant, Francois Andrieu, Maud Bidaud
Publikováno v:
ECS Transactions. 64:469-478
High mobility channels are considered as an interesting path to increase PMOS performances for advanced CMOS technology. Silicon-Germanium On Insulator (SGOI) benefits from both the advantage of the SiGe material (hole mobility booster) and the On In
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a8deae467a2adb71279cd274bc116fc8
https://doi.org/10.1149/06406.0469ecst
https://doi.org/10.1149/06406.0469ecst
Autor:
Clement Pribat, Elisabeth Blanquet, Fabien Rozé, Olivier Gourhant, Romain Duru, François Bertin, F. Abbate, Marc Juhel
Publikováno v:
ECS Transactions
ECS Transactions, Electrochemical Society, Inc., 2016, 75 (8), pp.67-78. ⟨10.1149/07508.0067ecst⟩
ECS Transactions, 2016, 75 (8), pp.67-78. ⟨10.1149/07508.0067ecst⟩
ECS Transactions, Electrochemical Society, Inc., 2016, 75 (8), pp.67-78. ⟨10.1149/07508.0067ecst⟩
ECS Transactions, 2016, 75 (8), pp.67-78. ⟨10.1149/07508.0067ecst⟩
The demand for higher speed and lower power consumption ICs has motivated research for higher mobility channel materials (1). Compressively strained SiGe is known to feature higher hole mobility than Si and is largely compatible with the Si CMOS manu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::485ecd9e8e37787f379fb75beba1d227
https://hal.archives-ouvertes.fr/hal-01656081
https://hal.archives-ouvertes.fr/hal-01656081
Publikováno v:
Solid-State Electronics. 53:865-868
Facet apparition during selective epitaxial growth of silicon and silicon–germanium alloys is reported in terms of morphology and kinetics. Epitaxial growth was performed on (0 0 1) Si wafers by chemical vapour deposition using the H2/HCl/SiH2Cl2 c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e99baa373579f835f79e820d13ae5120
https://doi.org/10.1016/j.sse.2009.04.038
https://doi.org/10.1016/j.sse.2009.04.038
Autor:
B. Le-Gratiet, G. Druais, Denis Rideau, Marie-Anne Jaud, J.-D. Chapon, D. Hoguet, M. Mellier, L. Babaud, Clement Pribat, Emmanuel Josse, D. Barge, S. Puget, J. Mazurier, L. Grenouillet, Nicolas Loubet, S. Zoll, Thierry Poiroux, Jerome Simon, S.P. Fetterolf, M. Bidaud, S. Chhun, M. Vinet, Quanwei Liu, R. Bianchini, E. Bernard, J.-F. Kruck, X. Gerard, C. Gaumer, A. Pofelski, Francois Andrieu, Mustapha Rafik, Olivier Weber, N. Guillot, Pascal Gouraud, F. Abbate, O. Faynot, N. Degors, Olivier Gourhant, Antoine Cros, L. Parmigiani, E. Petitprez, J. Lacord, Patrick Scheer, C. Monget, Michel Haond, Evelyne Richard, P. Maury, Bruce B. Doris, M. Celik, Daniel Benoit, Frederic Monsieur, E. Baylac, L. Clément, S. Lagrasta, Magali Gregoire, J.-P. Manceau, S. Lasserre, P. Perreau, P. Brun, C. Gallon, V. Beugin, Remi Beneyton, Eric Perrin, S. Delmedico, R. Bingert
Publikováno v:
2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.
This paper presents a 14nm technology designed for high speed and energy efficient applications using strain-engineered FDSOI transistors. Compared to the 28nm FDSOI technology, this 14nm FDSOI technology provides 0.55× area scaling and delivers a 3
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aedffd54e01f33ec4661fa88cc9e090c
https://doi.org/10.1109/vlsit.2014.6894343
https://doi.org/10.1109/vlsit.2014.6894343