Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Chung-Shi Liu"'
Autor:
Terry Ku, Tsung-Shu Lin, Jeng-Shien Hsieh, Chun Shu-Rong, Douglas Yu, Hao-Yi Tsai, Chung-Shi Liu, Tin-Hao Kuo, Chuei-Tang Wang
Publikováno v:
2020 IEEE 70th Electronic Components and Technology Conference (ECTC).
A novel wafer-scale system integration solution, InFO_SoW (System-on-Wafer), has been successfully developed to integrate known-good chips arrays with power and thermal module for high performance computing. InFO_SoW eliminates the use of substrate a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4e06ab1b1390cb86fd4f3d2596453df0
https://doi.org/10.1109/ectc32862.2020.00013
https://doi.org/10.1109/ectc32862.2020.00013
Autor:
Wu Kai-Chiang, Chung-Hao Tsai, Tang Tzu-Chun, Doug C. H. Yu, Chung-Shi Liu, Che-Wei Hsu, Chuei-Tang Wang, Pu Han-Ping, Chia-Chia Lin, Lu Chun-Lin
Publikováno v:
2019 Electrical Design of Advanced Packaging and Systems (EDAPS).
High Q-factor (quality factor) 3D solenoid inductor formed by RDL (redistribution layer) and copper via in the molding compound on InFO package was fabricated. The effect of the turns and cross sectional area on Q-factor is discussed. The 3D solenoid
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1c5ab65c83e3becf688654525e1270b8
https://doi.org/10.1109/edaps47854.2019.9011648
https://doi.org/10.1109/edaps47854.2019.9011648
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
A powerful integrated fan-out (InFO) wafer level system integration (WLSI) technology has been developed to integrate application processor chip with memory package for smart mobile devices. This novel InFO technology is the first high performance Fa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::36980a93c432694df1cad5c2cc9e3607
https://doi.org/10.1109/ectc.2016.65
https://doi.org/10.1109/ectc.2016.65
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
A low-cost, highly reliable UFI (UBM-free integration) wafer level chip scale packaging (WLCSP) for high performance, large die (>100 mm2) with fine solder ball pitch (350 µm) and high I/O (>800) has been developed. Reliability issues including sold
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::349651742e3763815d7ea8f40073a813
https://doi.org/10.1109/ectc.2016.87
https://doi.org/10.1109/ectc.2016.87
Ultra Fine Pitch / Low Cost FCCSP Package and Chip Package Interaction (CPI) for Advanced CMOS Nodes
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
The advancement of Si and flip chip package technologies are driven by high performance mobile processors with high I/O counts. In Si, the back-end-of-line (BEOL) copper interconnect with extreme low-K (ELK) dielectrics has been used to lower RC late
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b88c4fcbeac25a29377e6a77aadf3645
https://doi.org/10.1109/ectc.2016.125
https://doi.org/10.1109/ectc.2016.125
Autor:
Chung-Shi Liu, En-Hsiang Yeh, Monsen Liu, Jeng-Shien Hsieh, Ching-Wen Hsiao, Chuei-Tang Wang, Chung-Hao Tsai, Doug C. H. Yu, Chen-Shien Chen, Hsu-Hsien Chen, Mirng-Ji Lii
Publikováno v:
2013 IEEE International Electron Devices Meeting.
Array antenna integrated with RF chip using InFO-WLP technology is proposed for millimeter wave system applications. Aperture-coupled patch antenna is designed on the fan-out molding compound (MC). The performance of single-element antenna is evaluat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f24c7397624ab8f65cd58e6369ec3cc9
https://doi.org/10.1109/iedm.2013.6724687
https://doi.org/10.1109/iedm.2013.6724687