Zobrazeno 1 - 10
of 110
pro vyhledávání: '"Chun-Hsing Shih"'
Publikováno v:
Tạp chí Khoa học Đại học Đà Lạt, Vol 14, Iss 3S (2024)
Low bandgap and line tunneling techniques have demonstrated the most effectiveness in enhancing the on-current of tunnel field-effect transistors (TFETs). This study examines the mechanisms and designs of channel-buried oxide and a laterally doped po
Externí odkaz:
https://doaj.org/article/365b821bbd59401e8682f4d8ecb5bef9
Publikováno v:
Crystals, Vol 10, Iss 11, p 1036 (2020)
This work numerically elucidates the effects of transverse scaling on Schottky barrier charge-trapping cells for energy-efficient applications. Together with the scaled gate structures and charge-trapping dielectrics, variations in bias conditions on
Externí odkaz:
https://doaj.org/article/c2ff0110919d45f0bbb379a382e8b427
Autor:
Chun-Hsing Shih, Nguyen Van Kien
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 2, Iss 5, Pp 128-132 (2014)
This study presents a new asymmetric junctionless tunnel field-effect transistor (AJ-TFET) to scale TFETs into sub-10-nm regimes. The asymmetric junctionless p+ source/body and junctional n/p+ drain/body separately optimize the lateral source and dra
Externí odkaz:
https://doaj.org/article/3e5f533586ba4d8e803b0352e4335e56
Publikováno v:
Advances in Materials Science and Engineering, Vol 2014 (2014)
Externí odkaz:
https://doaj.org/article/03b3ee6d27954fa79947068c8030a0f0
Autor:
Chun-Hsing Shih, 施君興
92
The objective of this dissertation is to explore in depth the feasibility of continued scaling for the nanoscale MOSFET devices through precise modeling of short-channel effect and proper design of channel profile and device structure. The an
The objective of this dissertation is to explore in depth the feasibility of continued scaling for the nanoscale MOSFET devices through precise modeling of short-channel effect and proper design of channel profile and device structure. The an
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/55516698564296198206
Publikováno v:
Journal of Computational Electronics.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cec1f26878cf2ecd56c6f4faa64b4fc0
https://doi.org/10.1007/s10825-022-01997-4
https://doi.org/10.1007/s10825-022-01997-4
Publikováno v:
Current Applied Physics. 20:1342-1350
In this study, we examined the influence of using hetero-gate dielectrics (HGDs) on the short-channel effects (SCEs) in scaled tunnel field-effect transistors (TFETs). For bulk TFETs, the short-channel performance is not influenced by the HGD enginee
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f22f9017b99279cae63c5ef9a1b13921
https://doi.org/10.1016/j.cap.2020.09.004
https://doi.org/10.1016/j.cap.2020.09.004
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 19:426-432
This paper examines the temperature effect of Schottky barrier source/drain charge-trapping memories. The current–voltage curves and programming/erasing characteristics are experimentally investigated at room temperature and higher 85 °C and 125
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::85574d19a1e06f0d4ca0762ac5f0379c
https://doi.org/10.1109/tdmr.2019.2916483
https://doi.org/10.1109/tdmr.2019.2916483
Publikováno v:
2020 IEEE Eighth International Conference on Communications and Electronics (ICCE).
This study examined the dependence of the role and design of hetero-gate dielectric (HGD) on semiconductor film thickness in double-gate tunnel field-effect transistors (TFETs). The optimal position of the source-side dielectric heterojunction is nea
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::176a3de97e6040471f964e02021d1e81
https://doi.org/10.1109/icce48956.2021.9352038
https://doi.org/10.1109/icce48956.2021.9352038
Publikováno v:
Crystals
Volume 10
Issue 11
Crystals, Vol 10, Iss 1036, p 1036 (2020)
Volume 10
Issue 11
Crystals, Vol 10, Iss 1036, p 1036 (2020)
This work numerically elucidates the effects of transverse scaling on Schottky barrier charge-trapping cells for energy-efficient applications. Together with the scaled gate structures and charge-trapping dielectrics, variations in bias conditions on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4d43015049485c7549992e181b1b628c