Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Chun Shiah"'
Autor:
Tsung-Ming Wu, Nicky Chau-Chun Lu, Chun Shiah, Gang-Jhih Fan, Tzong-Lin Wu, Meng-Lin Wu, Chao-Kai Chan
Publikováno v:
2020 IEEE 24th Workshop on Signal and Power Integrity (SPI).
In this paper, the design tips considering power integrity (PI) for the power distribution network (PDN) in an re-distribution layer (RDL) are presented. First, the methodology of chip-RDL co-simulation is introduced. It indicates that decreasing the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0da0fc5c99818e4f2610ff6d03072e82
https://doi.org/10.1109/spi48784.2020.9218219
https://doi.org/10.1109/spi48784.2020.9218219
Autor:
W.M. Huang, K.C. Ting, Cheng-Nan Chang, Rick Dai, Ho-Yin Chen, C.P. Chuang, Nicky Chau-Chun Lu, Richard Crisp, W.J. Huang, C.N. Pan, C.P. Lin, S.H. Jheng, T.F. Chang, Chun Shiah, Bor-Doou Rong
Publikováno v:
VLSI Circuits
A new breed of Form-Factor-Driven DRAMs offers 80% lower standby power and > 50% IO signal reduction vs. Capacity-Driven commodity DRAM. Command/address/data are multiplexed onto 16 pins and combined with a Serial Control Pin in a Single-Edge-Pinout-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ed40854b5966f14cb4e7ccfe892bf938
https://doi.org/10.23919/vlsic.2019.8778049
https://doi.org/10.23919/vlsic.2019.8778049
Autor:
Tzong-Lin Wu, Chun Shiah, Gang-Jhih Fan, Meng-Lin Wu, Tsung-Ming Wu, Chao-Kai Chan, Nicky Chau-Chun Lu
Publikováno v:
2018 IEEE International Conference on Computational Electromagnetics (ICCEM).
In this paper, a simulation methodology considering signal integrity (SI) and power integrity (PI) from the chip, package, and board levels of a double-data-rate three (DDR3) memory module is presented. For SI issues, the chip-package-board simulatio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::672e68f9a9c166367c4ba4fb932e8d50
https://doi.org/10.1109/compem.2018.8496538
https://doi.org/10.1109/compem.2018.8496538
Publikováno v:
ISSCC
SRAM continues to be the critical technology enabler for a wide range of applications from low-power to high-performance computing. This session showcases the leading-edge SRAM developments from the semiconductor industry. Intel presents the smallest
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5ec2f0f1a31177e78cef8f98d736e5a3
https://doi.org/10.1109/isscc.2018.8310250
https://doi.org/10.1109/isscc.2018.8310250
Publikováno v:
ISSCC
The growing demand for battery-powered mobile devices is the major driver to keep pushing power and area scaling for SoCs. This year, the SRAM session is headlined by the most advanced 7nm SRAM designs from both TSMC and Samsung. A novel dual-rail lo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54099d30c4002514f5b79f357e712621
https://doi.org/10.1109/isscc.2017.7870332
https://doi.org/10.1109/isscc.2017.7870332
Autor:
Po-Lin Shih, Yu-Hui Sung, Shih-Lien Lu, Cheng-Wen Wu, Nicky Chau-Chun Lu, Chia-Hsin Lee, Chun-Nan Lu, Mei-Chiang Lung, Chi-Kang Chen, Wei Wu, Chun Shiah, Bor-Doou Rong, Kuo-Hua Lee, Ming-Wei Li, Yung-Fa Chou, Patrick F. Stolt, H.C. Shih, Pei-Wen Luo, Chung-Hu Ke, Ding-Ming Kwai, Shigeki Tomishima
Publikováno v:
VLSIC
Presented is a novel half Gb DRAM device for 3D stacked systems utilizing TSV. It is designed through the use of a new computer-aided design methodology and which realizes 819 Gb/s bandwidth across 16 channels and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b2737e611543092841174007bb2fef60
https://doi.org/10.1109/vlsic.2015.7231256
https://doi.org/10.1109/vlsic.2015.7231256