Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Christopher Torng"'
Publikováno v:
Transactions on Cryptographic Hardware and Embedded Systems, Vol 2022, Iss 4 (2022)
The extended GCD (XGCD) calculation, which computes Bézout coefficients ba, bb such that ba ∗ a0 + bb ∗ b0 = GCD(a0, b0), is a critical operation in many cryptographic applications. In particular, large-integer XGCD is computationally dominant f
Externí odkaz:
https://doaj.org/article/98d4c673131948d0a4ac22f01d663bed
Autor:
Kalhan Koul, Jackson Melchert, Kavya Sreedhar, Leonard Truong, Gedeon Nyengele, Keyi Zhang, Qiaoyi Liu, Jeff Setter, Po-Han Chen, Yuchen Mei, Maxwell Strange, Ross Daly, Caleb Donovick, Alex Carsello, Taeyoung Kong, Kathleen Feng, Dillon Huff, Ankita Nayak, Rajsekhar Setaluri, James Thomas, Nikhil Bhagdikar, David Durst, Zachary Myers, Nestan Tsiskaridze, Stephen Richardson, Rick Bahr, Kayvon Fatahalian, Pat Hanrahan, Clark Barrett, Mark Horowitz, Christopher Torng, Fredrik Kjolstad, Priyanka Raina
Publikováno v:
ACM Transactions on Embedded Computing Systems. 22:1-34
With the slowing of Moore’s law, computer architects have turned to domain-specific hardware specialization to continue improving the performance and efficiency of computing systems. However, specialization typically entails significant modificatio
Publikováno v:
IEEE Computer Architecture Letters. 22:45-48
The architecture of a coarse-grained reconfigurable array (CGRA) interconnect has a significant effect on not only the flexibility of the resulting accelerator, but also its power, performance, and area. Design decisions that have complex trade-offs
Publikováno v:
IACR Transactions on Cryptographic Hardware and Embedded Systems. :163-187
The extended GCD (XGCD) calculation, which computes Bézout coefficients ba, bb such that ba ∗ a0 + bb ∗ b0 = GCD(a0, b0), is a critical operation in many cryptographic applications. In particular, large-integer XGCD is computationally dominant f
Autor:
Kathleen Feng, Alex Carsello, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina
Publikováno v:
2022 IEEE Hot Chips 34 Symposium (HCS).
Autor:
Alex Carsello, James Thomas, Ankita Nayak, Po-Han Chen, Mark Horowitz, Priyanka Raina, Christopher Torng
Publikováno v:
Proceedings of the 59th ACM/IEEE Design Automation Conference.
Autor:
Alex Carsello, Kathleen Feng, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Autor:
Ian Galton, Ritchie Zhao, Tutu Ajayi, Shaolin Xie, Christopher Batten, Paul Gao, Austin Rovinski, Chun Zhao, Steve Dai, Scott Davidson, Dustin Richmond, Aporva Amarnath, Zhiru Zhang, Khalid Al-Hawaj, Ronald G. Dreslinski, Luis Vega, Bandhav Veluri, Anuj Rao, Julian Puscar, Michael Taylor, Christopher Torng
Publikováno v:
IEEE Solid-State Circuits Letters. 2:289-292
This letter presents a 16-nm 496-core RISC-V network-on-chip (NoC). The mesh achieves 1.4 GHz at 0.98 V, yielding a peak throughput of 695 Giga RISC-V instructions/s (GRVIS), a peak energy efficiency of 314.89 GRVIS/W, and a record 825 320 CoreMark b
Publikováno v:
HPCA
Reconfigurable accelerator fabrics, including coarse-grain reconfigurable arrays (CGRAs), have experienced a resurgence in interest because they allow fast-paced software algorithm development to continue evolving post-fabrication. CGRAs traditionall
Autor:
Raj Setaluri, Kathleen Feng, Nestan Tsiskaridze, Taeyoung Kong, Jeff Setter, Aina Niemetz, Christopher Torng, Keyi Zhang, Teguh Hofstee, Ross Daly, Mark Horowitz, Maxwell Strange, Qiaoyi Liu, Ankita Nayak, Rick Bahr, Priyanka Raina, Caleb Donovick, David Durst, Stephen Richardson, Gedeon Nyengele, Fredrik Kjolstad, Kavya Sreedhar, Clark Barrett, Leonard Truong, Pat Hanrahan, Alex Carsello, James J. Thomas, Kayvon Fatahalian, Dillon Huff, Makai Mann, Nikhil Bhagdikar, Jackson Melchert
Publikováno v:
DAC
Although an agile approach is standard for software design, how to properly adapt this method to hardware is still an open question. This work addresses this question while building a system on chip (SoC) with specialized accelerators. Rather than us