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pro vyhledávání: '"Christopher Peter Hurrell"'
Autor:
Christopher Peter Hurrell
Publikováno v:
IEEE Solid-State Circuits Magazine. 4:56-59
The 2010 IEEE Journal of Solid-State Circuits Best paper award was given to "An 18 b 12.5 MS/s ADC with 93 dB SNR," by Christopher Peter Hurrell, Colin Lyden, David Laing, Derek Hummerston, and Mark Vickery, published in IEEE Journal of Solid- State
Publikováno v:
VLSIC
This paper presents an 18 bit 5 MS/s SAR ADC. It has a dynamic range of 100.2 dB, SNR of 99 dB, INL of ±2 ppm and DNL of ±0.4 ppm. It has currently the lowest noise floor of any monolithic Nyquist converter relative to the full scale input (21.9 nV
Publikováno v:
5th IEE International Conference on ADDA 2005. Advanced A/D and D/A Conversion Techniques and their Applications.
This article describes a flexible decimation rate ΣΔ ADC which attains an SNR of 100 dB in a 1 MHz bandwidth and an SNR of 120 dB in a 20 kHz bandwidth. The MASH 2-2-0 architecture of the modulator employs low distortion multibit stages. An input b
Publikováno v:
International Journal of Simulation: Systems, Science & Technology; 2016, Vol. 17 Issue 29, p1-6, 6p
Autor:
Ohnhäuser, Frank
Publikováno v:
Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters; 2015, p51-118, 68p
Publikováno v:
IEEE Journal of Solid-State Circuits; 12/01/2010, Vol. 45 Issue 12, p2647-2654, 8p
Publikováno v:
IEEE Journal of Solid-State Circuits; Mar2008, Vol. 43 Issue 3, p739-752, 14p
Autor:
Hodges, David A.
Publikováno v:
IEEE Solid-State Circuits Magazine; Oct2016, Vol. 8 Issue 4, p24-33, 10p
Autor:
Olstein, Katherine
Publikováno v:
IEEE Solid-State Circuits Magazine; May2012, Vol. 4 Issue 2, p59-60, 0p
Publikováno v:
2014 Symposium on VLSI Circuits Digest of Technical Papers; 2014, p1-2, 2p