Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Christophe Desmouliers"'
Publikováno v:
IET Computers & Digital Techniques. 6:414-425
In this study, an image and video processing platform (IVPP) based on field programmable gate array (FPGAs) is presented. This hardware/software co-design platform has been implemented on a Xilinx Virtex-5 FPGA using a high-level synthesis and can be
Autor:
Christophe Desmouliers, Richard Hanley, Fernando Martinez Vallina, Erdal Oruklu, Semih Aslan, Jafar Saniie
Publikováno v:
Circuits and Systems. :1-9
This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis (HLS). HLS tools convert algorithms designed in C into hardware modules. This approach is a practical choice for developing complex applications. Nevertheless, c
Publikováno v:
2010 53rd IEEE International Midwest Symposium on Circuits and Systems.
Matrix operations are required in many complex algorithms in digital, image and video processing applications. The conventional method is usually used to implement matrix multiplications for small matrices. However, with the development of VLSI techn
Publikováno v:
2010 IEEE International Conference on Electro/Information Technology.
Matrix multiplication operations are heavily used in communication systems, video, signal and image processing applications such as echo cancellation, adaptive beamforming, and Multiple-Input Multiple-Output (MIMO) systems, and are also used in matri
Publikováno v:
2009 IEEE International Ultrasonics Symposium.
Ultrasonic 3D imaging is an important tool in NDE applications for quality control, flaw detection, and material characterization. However, ultrasonic 3D images often encompass immense amounts of data, making it very challenging for volumetric image
Publikováno v:
EIT
In this paper, an FPGA-based design and implementation of a high-performance video processing platform (VPP) is presented. A hardware/software codesign system is proposed on Xilinx Virtex II Pro FPGA to realize complex algorithms for real-time image
Publikováno v:
ReConFig
Designing a universal embedded hardware architecture for discrete wavelet transform (DWT) is a challenging problem due to the diversity among wavelet kernel filters. In this work, we present three different hardware architectures for implementing mul
Publikováno v:
IET Circuits, Devices & Systems. 5:321
Designing a universal embedded hardware architecture for discrete wavelet transform is a challenging problem because of the diversity among wavelet kernel filters. In this work, the authors present three different hardware architectures for implement