Zobrazeno 1 - 10
of 33
pro vyhledávání: '"Christian Pacha"'
Autor:
T. Lueftner, R.J. Knight, K. Just, Doris Schmitt-Landsiedel, G. Sauzon, P. Acharya, Christian Pacha, P. Hober, A. Bonnardot, P. Mahrla, O. Hoemke, A. Yakovleff, M. Sauer, Jörg Berthold, S. Buch, Georg Georgakos, Stephan Henzler, A. Klein, J. Beshenar
Publikováno v:
ISSCC
To meet the widely varying speed and power requirements of multifunctional mobile devices, an appropriate combination of technology features, circuit-level low-power techniques, and system architecture is implemented in a GSM/Edge baseband processor
Autor:
Christian Pacha, Georg Georgakos, Matthias Eireiner, Stephan Henzler, Doris Schmitt-Landsiedel, Jörg Berthold
Publikováno v:
Advances in Radio Science. 4:197-205
The effect of power supply noise in on-chip power grids and its implications on the path delay in digital circuits is examined. The simulation results show that IR-Drop and the resulting path delay are strongly affected by the layout of the circuit.
Dynamic State-Retention Flip-Flop for Fine-Grained Power Gating With Small Design and Power Overhead
Autor:
Matthias Eireiner, Doris Schmitt-Landsiedel, Christian Pacha, Georg Georgakos, Thomas Nirschl, Stephan Henzler, Joerg Berthold
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:1654-1661
Fine-grained power gating is the rigorous application of sleep transistor scheme to reduce stand-by power consumption in idle circuit blocks. Small circuit blocks are suspended for a short time while they are temporarily not needed. A sense-amplifier
Autor:
Ralf Brederlow, Christian Pacha, Joerg Berthold, E. Borinski, K. von Arnim, Roland Thewes, P. Seegebrecht, H.L. Fiedler
Publikováno v:
IEEE Journal of Solid-State Circuits. 40:1549-1556
The efficiency of body biasing for leakage reduction and performance improvement in a 90-nm CMOS low-power technology with triple-well option is evaluated. Static measurements of single devices and dynamic measurements of ring oscillators and 32-b pa
Autor:
Christian Pacha, Erhard Landgraf, Michael Specht, M. Stadele, Jessica Hartwich, T. Schulz, F. Hofmann, L. Dreeskornfeld, Richard Johannes Luyken, Johannes Kretz, L. Risch, W. Rosner
Publikováno v:
Solid-State Electronics. 48:521-527
Ultra-thin-body silicon-on-insulator (UTB-SOI) is one of the most promising candidates for future CMOS technologies with minimum feature sizes below 50 nm. In this paper, we analyse the impact of different combinations of doping profiles and gate sid
Publikováno v:
Solid-State Electronics. 47:1205-1211
Ultra-thin-body silicon-on-insulator (UTB-SOI) is one of the most promising candidates for future CMOS technologies with minimum feature sizes below 50 nm [1] . In this paper we analyze the impact of this emerging CMOS device concept on the performan
Autor:
Hans Reisinger, Christian Schlunder, Karl Hofmann, J. Hatsch, Thomas Baumann, Christian Pacha, Georg Georgakos, T. Kodytek, Klaus Von Arnim, K. Ermisch, T. Pompl, Wolfgang Gustin
Publikováno v:
2010 Symposium on VLSI Technology.
A product-level aging monitor replicating a 40nm CMOS ARM1176 critical path is presented. The monitor enables a separation of the dominating negative bias instability (NBTI) stress, including speed recovery, and the switching-activity dependent hot c
Autor:
Klaus Schruefer, Thomas Schulz, Thomas Baumann, Christian Pacha, Klaus Von Arnim, Joerg Berthold, Karl Hofmann
Publikováno v:
2009 IEEE International Electron Devices Meeting (IEDM).
We present an easy to use method to extrapolate digital circuit performance and power from nominal to worst-case operating conditions. It allows the circuit designer to explore the design space over a continuous rage of voltages and temperatures and
Autor:
M. Hatzistergos, Christian Pacha, Haoren Zhuang, Melanie J. Sherony, Yong Meng Lee, T.J. Tang, S. Han, S. Samavedam, Jens Haetty, Sun-OO Kim, Martin Ostermayr, R. Divakaruni, V.-Y. Theon, Weipeng Li, Kenneth J. Stein, Michael P. Chudzik, Haizhou Yin, X. Chen, Richard Lindsay, J.-P. Han, M. Chowdhury, Jaeger Daniel, Naim Moumen, Dae-Gyu Park, Nam-Sung Kim, Kisang Kim, Manfred Eller, Dominic J. Schepis, Rainer Loesing, Mukesh Khare, J. Chen, K. von Arnim, An L. Steegen, Thomas S. Kanarsky, Vijay Narayanan, W. Yan, Klaus Schruefer
Publikováno v:
2009 International Symposium on VLSI Technology, Systems, and Applications.
This paper presents performance evaluation of high-κ/metal gate (HK/MG) process on an industry standard 45nm low power microprocessor built on bulk substrate. CMOS devices built with HK/MG demonstrate 50% improvement in NFET and 65% improvement in P
Autor:
Domagoj Siprak, Weize Xiong, Florian Bauer, C. Russ, Christian Pacha, Andrew Marshall, C.R. Cleavelin, G. Knoblinger, Doris Schmitt-Landsiedel, Klaus Von Arnim, M. Fulde, Klaus Schruefer
Publikováno v:
ICECS
In this paper recent advances in multi-gate MOSFET (MuGFET) circuit design are reported. The feasibility of essential parts of low-power mobile SoC applications and large scale integration capability is shown. Excellent short channel control enables