Zobrazeno 1 - 10
of 91
pro vyhledávání: '"Christa Vrancken"'
Autor:
Dan Mocuta, E. Chiu, Nadine Collaert, Roger Loo, Robert Langer, A. De Keersgieter, Paola Favia, Liesbeth Witters, Hiroaki Arimura, Frank Holsteyns, Farid Sebaai, Kathy Barla, E. Vancoille, Andreas Schulze, Tom Schram, V. De Heyn, Steven Bilodeau, Andriy Hikavyy, Peter Storck, Jerome Mitard, A. Opdebeeck, Katia Devriendt, Emanuel I. Cooper, Christa Vrancken, Ruben R. Lieten, Geert Eneman, Kurt Wostyn, Alexey Milenin, Niamh Waldron
Publikováno v:
IEEE Transactions on Electron Devices. 64:4587-4593
Strained Ge p-channel gate-all-around (GAA) devices with Si-passivation are demonstrated on high-density 45-nm active pitch starting from 300-mm SiGe strain relaxed buffer wafers. While single horizontal Ge nanowire (NW) devices are demonstrated, the
Autor:
A. De Keersgieter, Dan Mocuta, L.-A. Ragnarsson, Daniil Marinov, Robert Langer, E. Dupuy, Roger Loo, Yong Kong Siew, Andriy Hikavyy, G. Mannaert, Anurag Vohra, Liesbeth Witters, Nadine Collaert, Farid Sebaai, V. De Heyn, Hiroaki Arimura, E. Capogreco, Kathy Barla, Christa Vrancken, A. Opdebeeck, F. Holstetns, Steven Demuynck, Naoto Horiguchi, Jerome Mitard, E. Altamirano Sanchez, Clement Porret
Publikováno v:
2019 Symposium on VLSI Technology.
This paper demonstrates high performance strained p-type double stacked Ge Gate-AlI-Around (GAA) devices at significantly reduced gate lengths $(\text{L}_{\text{G}}\sim 25\text{nm})$ compared to our previous work. Excellent electrostatic control is m
Replacement Metal Contact Using Sacrificial ILD0 for Wrap Around Contact in Scaled FinFET Technology
Autor:
Katia Devriendt, T. Hopf, Naoto Horiguchi, Antoine Pacco, Lieve Teugels, Dan Mocuta, Steven Demuynck, E. Altamirano Sanchez, Christa Vrancken, A. Dangol, S-A. Chew, Liping Zhang, J. Versluijs
Publikováno v:
2018 IEEE International Interconnect Technology Conference (IITC).
In this work, we propose replacement metal contact (RMC) flow by using sacrificial ILD0 that is suitable for wrap around contact (WAC). RMC minimize erosion of gate plug, spacer and S/D area at scaled contact formation. The concept of the flow has be
Autor:
Kurt Wostyn, Christa Vrancken, Dan Mocuta, Andreas Schulze, Clement Porret, Jerome Mitard, E. Dentoni Litta, Hiroaki Arimura, V. De Heyn, Robert Langer, A. Opdebeeck, Nadine Collaert, Niamh Waldron, Liesbeth Witters, Hugo Bender, Geert Eneman, Frank Holsteyns, Alexey Milenin, Andriy Hikavyy, E. Capogreco, Kathy Barla, Paola Favia, Roger Loo, Farid Sebaai
Publikováno v:
2018 IEEE Symposium on VLSI Technology.
This paper reports on strained p-type Ge Gate-All-Around (GAA) devices on 300mm SiGe Strain-Relaxed-Buffers (SRB) with improved performance as compared to our previous work. The Q factor is increased to 25, I on =500μA/μm at I off =100nA/μm is ach
Publikováno v:
IEEE Transactions on Electron Devices. 62:1789-1795
An analysis of pocket dopant deactivation and its impact on $V_{\textrm {th}}$ variation for scaled Si devices using an atomistic kinetic Monte Carlo approach are shown in this paper. B 5 keV, $5\times 10^{13}$ /cm $^{\mathrm {{2}}}+$ As 1 keV, $1 \t
Autor:
Dan Mocuta, Hiroaki Arimura, A. De Keersgieter, V. De Heyn, Kathy Barla, Christa Vrancken, Liesbeth Witters, Steven Bilodeau, Katia Devriendt, Ruben R. Lieten, Nadine Collaert, Jerome Mitard, Alexey Milenin, Emanuel I. Cooper, Geert Eneman, Roger Loo, Niamh Waldron, Tom Schram, Farid Sebaai, Frank Holsteyns, E. Vancoille, Kurt Wostyn, Andriy Hikavyy, Peter Storck, Paola Favia, Robert Langer, Andreas Schulze, A. Opdebeeck
Publikováno v:
2017 Symposium on VLSI Technology.
Strained Ge p-channel Gate-All-Around (GAA) FETs are demonstrated on 300mm SiGe Strain Relaxed Buffer (SRB) and 45nm Fin pitch with the shortest gate lengths (L g =40nm) and smallest Ge nanowire (NW) diameter (d=9nm) reported to date. Optimization of
Publikováno v:
Journal of Computational Electronics. 13:33-39
In this article, modeling of junction formation in scaled Si device is shown. An atomistic kinetic Monte Carlo (KMC) diffusion modeling is used for the analysis of dopant diffusion and defects during shallow junction formation processes. Dopant diffu
Autor:
Roger Loo, Hugo Bender, Anda Mocuta, Stefan Kubicek, Daire J. Cott, Paola Favia, Nadine Collaert, Liesbeth Witters, Yuichiro Sasaki, A. V-Y. Thean, Dan Mocuta, Hans Mertens, Lars-Ake Ragnarsson, Hiroaki Arimura, Naoto Horiguchi, Christa Vrancken, Andreas Schulze, Jerome Mitard, Romain Ritzenthaler, Andriy Hikavyy, Kathy Barla, Thomas Chiarella
Publikováno v:
2016 IEEE Symposium on VLSI Technology.
Sub-30nm L G Fin-replacement strained-Germanium pFinFETs at state-of-art device dimensions are reported with optimized S/D junctions and RMG stack. Competitive performance is shown for the first time when comparing the sGe devices with counterparts f
Autor:
M. A. Pawlak, Mihaela Popovici, Minsoo Kim, Jorge A. Kittl, Annelies Delabie, Johan Swerts, Karl Opsomer, L. Altimime, M.M. Salimullah, M. Schaekers, B. Kaczer, K. Tomida, Ingrid Debusschere, Sven Van Elshocht, Christa Vrancken
Publikováno v:
ECS Transactions. 41:41-51
A comparative study of the growth behavior of nm-thin ruthenium layers by plasma enhanced atomic layer deposition using two ruthenium precursors is discussed. For bis(ethylcyclopentadienyl)-ruthenium or Ru(EtCp)2, we have found a large incubation tim
Autor:
Christa Vrancken, David Hellin, Werner Boullart, J. Geypen, Vasile Paraschiv, I. Vos, Hugo Bender, Guglielma Vecchio, Johan Vertommen
Publikováno v:
ECS Transactions. 25:29-36
A dry-wet patterning process for La2O3/HfO2-containing high-κ/ metal gate stacks was successfully developed. The process meets the stringent requirements of complete removal of the high-κ layers and metal-containing sidewall residues without induci