Zobrazeno 1 - 10
of 33
pro vyhledávání: '"Chong-Cheng Fu"'
Publikováno v:
SPIE Proceedings.
Across-chip and across-wafer patterned linewidth variation (ACLV and AWLV respectively) as well as linewidth roughness (LWR) are key contributors to device performance variation. For polysilicon gate patterning, the linewidth control enabled by vario
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f65bd69b5de2b2efc1f034727df4b034
https://doi.org/10.1117/12.686594
https://doi.org/10.1117/12.686594
Autor:
Chong-Cheng Fu, James P. Shiely, Qiliang Yan, Bradley J. Falch, Min Bai, Ruoping Wang, Lawrence S. Melvin
Publikováno v:
SPIE Proceedings.
As an important resolution enhancement technique (RET), alternating aperture phase shift masks (AAPSM) has been widely adopted in 90 nm technology node and beyond. Mask topographical effect due to the 3D nature of the shifter features is becoming an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f4afc29fa30bfdf55a8b15df8f62e08a
https://doi.org/10.1117/12.600547
https://doi.org/10.1117/12.600547
Publikováno v:
1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
A two-lump model, developed for MOS pass transistors, to represent the turnoff transient error charge, will be described. Reduction of this error by 90% will be cited for a circular transistor structure.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::30107e1d05f906e1588b3fa9ff0f157b
https://doi.org/10.1109/isscc.1986.1157005
https://doi.org/10.1109/isscc.1986.1157005
Publikováno v:
SPIE Proceedings.
Complementary Phase Shift Mask (c:PSM) has been a key photolithographic technique employed by chip makers, including Motorola, to fabricate 130nm-node devices. Advancing from the 130nm to 90nm technology generation, the c:PSM process needs fundamenta
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::36c83176946fb484496433f172d26da3
https://doi.org/10.1117/12.569311
https://doi.org/10.1117/12.569311
Publikováno v:
SPIE Proceedings.
Due to the rapidly reduced imaging process windows and increasingly stingent device overlay requirements, sub-130 nm lithography processes are more severely impacted than ever by systamic fault. Limits on critical dimensions (CD) and overlay capabili
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::adeedffec815f8698519d09367fd0ec9
https://doi.org/10.1117/12.483665
https://doi.org/10.1117/12.483665
Autor:
Scott Warrick, Chong-Cheng Fu, Chris J. Smith, Henry Megens, Paul Christiaan Hinnen, Richard Johannes Franciscus Van Haren
Publikováno v:
SPIE Proceedings.
In a joint development program between ASML and Motorola a new set of alignment marks have been designed and tested using the ATHENA off-axis alignment system on the ASML scanner. The new marks were analyzed for improved robustness against varying wa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::31ee12bf5d1b4ca07bcc456400fc1075
https://doi.org/10.1117/12.474476
https://doi.org/10.1117/12.474476
Autor:
Carla M. Nelson-Thomas, Ruoping Wang, Chong-Cheng Fu, Michael E. Kling, Matthew A. Thompson, Nigel Cave
Publikováno v:
SPIE Proceedings.
Gate patterning has always been held to tight specifications for CD variation compared to other layers. Specifically, the gate layer is more concerned with the total CD variations including Across Chip Linewidth Variation (ACLV), Across Wafer Linewid
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ffe149292670e0402e3e3ee3076d4de6
https://doi.org/10.1117/12.435746
https://doi.org/10.1117/12.435746
Autor:
Chong-Cheng Fu, Navakanta Bhat, Sejal N. Chheda, Paul G. Y. Tsui, Sean Collins, Suzanne Gonzales, Amit Nangia, Nigel Cave, Philip Sung-Joon Choi, F. Huang
Publikováno v:
SPIE Proceedings.
In this paper, we discuss the issues involved in the DC hot carrier lifetime extrapolation of sub 100nm NMOS transistors. We look at device degradation due to hot- carrier injection in NMOS transistors with 20 angstrom and 25 angstrom thermal and nit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f0f988e0a84564e4bb2522028a11130f
https://doi.org/10.1117/12.360551
https://doi.org/10.1117/12.360551
Autor:
Lloyd C. Litt, John A. Allgair, John L. Sturtevant, Chong-Cheng Fu, Robert R. Hershey, Kent G. Green, Bernard J. Roman, Michael E. Kling, Gary Stanley Seligman, Kevin D. Lucas, Mike Schippers
Publikováno v:
SPIE Proceedings.
It is well known that systematic within-chip dimension (CD) errors can strongly influence product yield and performance, especially in the case of microprocessors. It has been shown that this across chip linewidth variation (ACLV) dominates the CD er
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::17ccf75987451149665c26a91a1d59ed
https://doi.org/10.1117/12.354335
https://doi.org/10.1117/12.354335
Autor:
Linard Karklin, Chong-Cheng Fu, Nigel Cave, Alfred J. Reich, Drew R. Russell, John L. Sturtevant, Kevin D. Lucas, Ruiqi Tian, Bradley J. Falch, Kent G. Green, Michael E. Kling, Bernard J. Roman, Yao-Ting Wang
Publikováno v:
SPIE Proceedings.
It is becoming increasingly clear that semiconductor manufacturers must rise to the challenge of extending optical microlithography beyond what is forecast by the current SIA roadmap. Capabilities must be developed that allow the use of conventional
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1238cd46bdee2c6a49b48a99dadca8da
https://doi.org/10.1117/12.354297
https://doi.org/10.1117/12.354297