Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Chiu-Wang Lien"'
Publikováno v:
A-SSCC
Resistive RAM (ReRAM) is an attractive candidate for next generation embedded nonvolatile memory [1][2], with several advantages compared to conventional flash technology. First, ReRAM is a CMOS-compatible low temperature back-end of line (BEOL) memo
Autor:
Chiu-Wang Lien, Te-Liang Lee, Yue-Der Chih, Haw-Yun Wu, Chen-Mei Huang, Cheng-Wei Tsai, Chrong Jung Lin
Publikováno v:
IEEE Transactions on Electron Devices. 59:1899-1905
A new fully logic process compatible 2T multitime programmable (MTP) memory cell has been introduced for embedded logic nonvolatile memory (NVM) applications. The cell adopts a novel contact coupling gate structure as an additional control gate for h
Autor:
Chiu-Wang Lien, Chrong Jung Lin, Zhi-Sung Yang, Ya-Chin King, Wen Chao Shen, Te-Liang Lee, Hsin-Wei Pan, Yue-Der Chih
Publikováno v:
IEEE Electron Device Letters. 34:1127-1129
This letter presents a novel high density differential split gate flash memory with self-boosting function realized by 0.18- μm embedded memory technology from Taiwan Semiconductor Manufacturing Company. The cell has a pair of symmetric floating gat
Publikováno v:
IEEE Electron Device Letters. 32:1352-1354
In this letter, we propose a new fully logic-process-compatible multitime programmable (MTP) memory cell for high-density logic nonvolatile memory (NVM) applications. A very small logic NVM MTP cell has been demonstrated on pure 0.18-μm CMOS process
Autor:
Wun-Jie Lin, Chiu-Wang Lien, Hsiao-Lan Yang, Ya-Chin King, Chrong Jung Lin, Yi-Hung Tsai, Te-Liang Lee
Publikováno v:
IEEE Electron Device Letters. 32:587-589
This letter presents a novel differential p-channel logic-compatible multiple-time programmable (MTP) memory cell. This MTP cell has a pair of floating gates, and performs differential read to increase the on/off window. Additionally, a novel self-re
Autor:
Yi-Chan Chen, K. H. Tsai, Frederick T. Chen, Chiu-Wang Lien, Pang-Shiu Chen, M.-J. Tsai, H. Y. Lee
Publikováno v:
2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
A novel resistive memory with the TiN/Ti/HfO x /TiN stack is proposed and fully integrated with 0.18 µm CMOS technology. The excellent memory performances such as low operation current (down to 25 µA), low operation voltage ( 100 M cycles), and rel
Autor:
Yu-Hsiu Chen, Tai-Yuan Wu, Ching-Chiun Wang, H. Y. Lee, Feng Chen, Pang-Shiu Chen, Pei-Jer Tzeng, Chiu-Wang Lien, M.-J. Tsai
Publikováno v:
IEEE Electron Device Letters. 31:44-46
The memory performance of hafnium oxide (HfOx)-based resistive memory containing a thin reactive Ti buffer layer can be greatly improved. Due to the excellent ability of Ti to absorb oxygen atoms from the HfOx film after post-metal annealing, a large
Autor:
Yung-Sheng Chen, Heng-Yuan Lee, Pang-Shiu Chen, M.-J. Tsai, Frederick T. Chen, Chiu-Wang Lien
Publikováno v:
2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.
A novel resistive memory with the TiN/Ti/HfO x /TiN stack is proposed and fully integrated with 0.18 µm CMOS technology. The excellent memory performances such as low operation current (down to 25 µA), low operation voltage ( 100 M cycles), and rel
Autor:
Te-Liang Lee, Chrong Jung Lin, Ching-Hua Wang, Chiu-Wang Lien, Wen Chao Shen, Yue Der Chih, Zhi-Sung Yang, Ya-Chin King, Hsin-Wei Pan
Publikováno v:
Japanese Journal of Applied Physics. 53:04ED08
A new high-density AND-type split gate (ASG) flash memory realized by the Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 µm embedded flash process has been successfully demonstrated and fabricated. This ASG flash memory has a pair of symmetr