Zobrazeno 1 - 10
of 31
pro vyhledávání: '"Chip select"'
Publikováno v:
INAJEEE Indonesian Journal of Electrical and Eletronics Engineering. 3:63-69
Serial Peripheral Interface (SPI) is a synchronous serial communication whose data or signal transmission involves Chip Select (CS) or Slave Select (SS) pins, Serial Clock (SCK), Master Out Slave In (MOSI), and Master In Slave Out (MISO). In the Ardu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9c4c5c14ef0a1d2377fbef49b082456f
https://doi.org/10.26740/inajeee.v3n2.p63-69
https://doi.org/10.26740/inajeee.v3n2.p63-69
Autor:
Andrew Lines
Publikováno v:
ASYNC
"Tour Pin Input Output" (FPIO) is a delayinsensitive asynchronous bit-serial multi-chip management protocol which surpasses "Serial Peripheral Interface" (SPI) by eliminating timing races, waiting for peripherals to acknowledge, using unidirectional
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::724308e8595e47a09c89311e36f29640
https://doi.org/10.1109/async48570.2021.00017
https://doi.org/10.1109/async48570.2021.00017
Publikováno v:
2020 International Conference on Electronics, Information, and Communication (ICEIC).
To avoid the accuracy drop caused by slowing down the refresh rate of a DRAM, the proposed approximate DRAM flexibly controls the refresh operation for different bits of data. Data are reorganized and mapped to different DRAM devices according to the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::458125c85d2295bfece4227c2cc5b488
https://doi.org/10.1109/iceic49074.2020.9051355
https://doi.org/10.1109/iceic49074.2020.9051355
Autor:
Ye-Sheng Kuo, Zhiyoong Foo, David Blaauw, Ronald G. Dreslinski, Prabal Dutta, Gyouho Kim, Yoonmyung Lee, Pat Pannuto, Benjamin Kempke
Publikováno v:
IEEE Micro. 36:60-70
I/O has become the limiting factor in scaling down size and power toward the goal of invisible computing. Achieving this goal will require composing optimized and specialized--yet reusable--components with an interconnect that permits tiny, ultra-low
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea72b82b8e1f950d8d0e94a58628a460
https://doi.org/10.1109/mm.2016.41
https://doi.org/10.1109/mm.2016.41
Autor:
Ming-Yi Lin, Min-Chun Tuan, Tsun-Kuang Chi, Liang-Hung Wang, Wei-Yuan Chiang, Shih-Lun Chen, Patricia Angela R. Abu, Chiung-An Chen
Publikováno v:
Electronics, Vol 9, Iss 1509, p 1509 (2020)
Electronics
Volume 9
Issue 9
Electronics
Volume 9
Issue 9
In this paper, a novel low-power synchronous preamble data line protocol chip design for serial communication is proposed. The serial communication only uses two wires, chip select (CS) and secure digital (SD), to transmit and receive data between tw
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6bd41308355217af7964e50300ef6412
https://doi.org/10.3390/electronics9091509
https://doi.org/10.3390/electronics9091509
Autor:
Stefan Dekker
The research done is focussed on improving the gap between the number of academic proof of concept microfluidic devices and the number of commercial application. A start is made by analysing the factors that inhibit the commercialization of microflui
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a851b9380d4501532c2d319cf1ecdc7f
https://doi.org/10.3990/1.9789036546119
https://doi.org/10.3990/1.9789036546119
Autor:
S. Umadevi, Dinesh Katuri
Publikováno v:
Nanoelectronic Materials and Devices ISBN: 9789811071904
This paper presents the design of Wishbone compliant memory controller which behaves as interface between processor and memory. Memory controller is a digital circuit which manages the flow of data to and fro from the processor to the memory. Instead
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::979f02019c3f5648672cda6543b2fb60
https://doi.org/10.1007/978-981-10-7191-1_19
https://doi.org/10.1007/978-981-10-7191-1_19
Publikováno v:
Practical Electrical Engineering ISBN: 9783319211725
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::97a4a4cc73dd607c5de48fd24c768c95
https://doi.org/10.1007/978-3-319-21173-2_14
https://doi.org/10.1007/978-3-319-21173-2_14
This chapter covers the popular Serial Peripheral Interface (SPI) for microcontroller communication. One master device controls bidirectional communication with one or more slave devices on the SPI bus, with a chip select line for each device to choo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e34542c010d3ab7076c649eff5f4cc2
https://doi.org/10.1016/b978-0-12-420165-1.00012-3
https://doi.org/10.1016/b978-0-12-420165-1.00012-3
A compact isolated low-power 32-channel 16-bit data-logging system around an NXP ARM processor (LPC1768) and four of the linear technology octal analogue-to-digital converters (ADCs) LTC1857/58/59 is designed. The system requires only 250 mA when pow
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d87097122bbb313f11febe66e0ef558f
http://hdl.handle.net/11588/588189
http://hdl.handle.net/11588/588189