Zobrazeno 1 - 10
of 65
pro vyhledávání: '"Chiew-Seng Koay"'
Publikováno v:
SPIE Proceedings.
Traditionally, the total measurement uncertainty (TMU) of overlay metrology focuses on dynamic precision, toolinduced-shift, and matching, while rarely examining inaccuracy. However, some researchers have recently shown that measurement inaccuracy ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::50c57d96d21216ba8e7ff0b36e9bcf1a
https://doi.org/10.1117/12.2260007
https://doi.org/10.1117/12.2260007
Publikováno v:
SPIE Proceedings.
Having a well designed overlay metrology target is one of the ways to improve on-product overlay performance. The traditional screening method in which multiple targets types are added to successive reticle tape outs and then evaluated by trial-and-e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fbcef7872b90fe3ea006d7cbbc2fd5a4
https://doi.org/10.1117/12.2220382
https://doi.org/10.1117/12.2220382
Autor:
Neal Lafferty, Hosadurga Shobha, Wenhui Wang, Terry A. Spooner, Tae-Soo Kim, Matthew E. Colburn, Yann Mignot, Yongan Xu, Yunpeng Yin, Benjamin Duclaux, Shyng-Tsong Chen, Chiew-seng Koay, Marcy Beard, James J. Kelly, Oscar van der Straten, Seowoo Nam, Ming He, Nicole Saulnier
Publikováno v:
2013 IEEE International Interconnect Technology Conference - IITC.
For sub-64nm pitch interconnects build, it is beneficial to use Self Aligned Double Patterning (SADP) scheme for line level patterning. Usually a 2X pitch pattern was printed first, followed by a Sidewall Image Transfer (SIT) technique to create the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::39a5d247773726f8e5f9ada178ac4257
https://doi.org/10.1109/iitc.2013.6615589
https://doi.org/10.1109/iitc.2013.6615589
Autor:
Jonathan Ludwicki, Nicole Saulnier, Michael Cicoria, Matthew E. Colburn, David Hetzer, Chiew-seng Koay
Publikováno v:
SPIE Proceedings.
Wet chemical slimming of resist can enable a resist mandrel for sidewall-image transfer (SIT) by decreasing the mandrel width and smoothing the mandrel sidewalls. This would reduce the cost of the SIT process. Several key metrics are used to compare
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c764df50539ad1f6bb9c7d505c7fe647
https://doi.org/10.1117/12.2011506
https://doi.org/10.1117/12.2011506
Autor:
Scott Halle, Marcy Beard, Chiew-seng Koay, Oscar van der Straten, T. Levin, Lars Liemann, Juntao Li, D. Horak, Bryan Morris, Terry A. Spooner, S. Choi, Carol Boye, Donald F. Canaperi, Sylvie Mignot, Muthumanickam Sankarapandian, Elbert E. Huang, Chiahsun Tseng, James Hsueh-Chung Chen, Erin Mclellan, James J. Kelly, S. Fan, James J. Demarest, Nicole Saulnier, Hosadurga Shobha, Matthew E. Colburn, Balasubramanian S. Haran, Yongan Xu, Yunpeng Yin, Larry Clevenger, Christopher J. Waskiewicz, Mignot Yann, John C. Arnold
Publikováno v:
2012 IEEE International Interconnect Technology Conference.
This work demonstrates the building of a 56 nm pitch copper dual damascene interconnects which connects to the local interconnect level. This M1/V0 dual-damascene used a triple pitch split bi-directional M1 and a double pitch split contact (V0) schem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f371baddebc7d64eac10bf2c213e8ee5
https://doi.org/10.1109/iitc.2012.6251637
https://doi.org/10.1109/iitc.2012.6251637
Autor:
Atsuko Yamaguchi, Chiew-seng Koay, Scott Halle, Matthew E. Colburn, Shyng-Tsong Chen, Shoji Hotta, Takeshi Kato
Publikováno v:
2012 SEMI Advanced Semiconductor Manufacturing Conference.
A Critical Dimension-Scanning Electron Microscopy (CD-SEM) technique for determination of both the CD width and the local overlay between individual pitch split layer 1 and layer 2 is employed for measurement on electrical device test structures and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e1c3a4e4c25ae9dbc206400b68d57035
https://doi.org/10.1109/asmc.2012.6212920
https://doi.org/10.1109/asmc.2012.6212920
Autor:
Sohan Singh Mehta, Yunpeng Yin, Yannick Loquet, Chiahsun Tseng, Peggy Lawson, Chen Jim C, Shinichiro Kawakami, Dave Hetzer, Sean D. Burns, Matthew E. Colburn, Mark Kelling, Vikrant Chauhan, Lior Huli, Shyng-Tsong Chen, Jerome Wandell, Guillaume Landie, Martin Glodde, Bassem Hamieh, Chiew-seng Koay, Yongan Xu, Shannon Dunn, Alvin G. Thomas, John C. Arnold, Terry A. Spooner, Jeong Soo Kim, Yuyang Sun, Martin Burkhardt, David V. Horak, Hirokazu Kato, Yoshinori Matsui, Jason Cantone, Mignot Yann
Publikováno v:
SPIE Proceedings.
The objective of this work is to describe the advances in 193nm photoresists using negative tone developer and key challenges associated with 20nm and beyond technology nodes. Unlike positive tone resists which use protected polymer as the etch block
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d3171a0ceeaef04c92354f5cd650cda2
https://doi.org/10.1117/12.917560
https://doi.org/10.1117/12.917560
Autor:
Matthew E. Colburn, Karen Petrillo, Xuelian Zhu, Scott Halle, Timothy A. Brunner, Daniel Corliss, Hirokazu Kato, Emily Gallagher, Alfred Wagner, Ralph Schlief, Tom Wallow, Lei Sun, Yunpeng Yin, John C. Arnold, Chiew-seng Koay, Chen Jim C, S. Fan, Obert Wood, Jongwook Kye, Guillaume Landie, Deniz E. Civay, Gregory McIntyre, Satoshi Nagai, Cecilia C. Smolinski, Pak Leung, Sudhar Raghunathan, Craig Higgins, Ming He, Martin Burkhardt
Publikováno v:
SPIE Proceedings.
The first use of extreme ultraviolet (EUV) lithography in logic manufacturing is targeted for the 14 nm node, with possible earlier application to 20-nm node logic device back-end layers to demonstrate the technology. Use of EUV lithography to patter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ddb0e74548a401ff26adb08617fe5c9
https://doi.org/10.1117/12.916292
https://doi.org/10.1117/12.916292
Autor:
Hirokazu Kato, J. Maniscalco, Kazumichi Tsumura, D. Horak, John C. Arnold, Guillaume Landie, Shyng-Tsong Chen, Hideyuki Tomizawa, Hosadurga Shobha, O. van der Straten, Muthumanickam Sankarapandian, Sean D. Burns, Takamasa Usui, Terry A. Spooner, Yunpeng Yin, Tuan A. Vo, Chiew-seng Koay, Matt Colburn, M. Tagami, James J. Kelly, M. Ishikawa
Publikováno v:
2011 IEEE International Interconnect Technology Conference.
A self-aligned via(SAV) process was employed to build 64nm pitch Dual-Damascene(DD) interconnects using a pitch split double exposure pattering scheme to form the Cu lines. TiN hardmask (HM) density and thickness were optimized to achieve the SAV pro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b50f9842b6c66eec5a97dbf1369162c
https://doi.org/10.1109/iitc.2011.5940305
https://doi.org/10.1109/iitc.2011.5940305
Autor:
Matthew E. Colburn, Steven J. Holmes, Brian Osborn, Sean D. Burns, Shinichiro Kawakami, David Hetzer, Sumanth Kini, Hideyuki Tomizawa, Nicolette Fender, Chiew-seng Koay, Karen Petrillo, John C. Arnold, Terry A. Spooner, Yunpeng Yin, Guillaume Landie, Rex Chen, Mark Slezak, Rao Varanasi, Scott Halle, Cherry Tang, Shyng-Tsong Chen, Jason Cantone, Sen Liu, Shannon Dunn, Lovejeet Singh
Publikováno v:
2011 IEEE/SEMI Advanced Semiconductor Manufacturing Conference.
Pitch-split resist materials have been developed for the fabrication of sub-74 nm pitch semiconductor devices. A thermal cure method is used to enable patterning of a second layer of resist over the initially formed layer. Process window, critical di
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::af87b43e4bcb019c9a490910ebf0ba2b
https://doi.org/10.1109/asmc.2011.5898203
https://doi.org/10.1109/asmc.2011.5898203