Výsledky vyhledávání - "Chiang Hung-Li"

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Design Space Analysis for Cross-Point 1S1MTJ MRAM: Selector–MTJ Cooptimization

Autor: Ming-Yuan Song, Katherine Chiang, Chen Tzu-Chiang, Jin Cai, Chiang Hung-Li, Mauricio Manfrini, Jung-Piao Chiu, Tahui Wang, Chen Yu-Sheng, H.-S. Philip Wong, Carlos H. Diaz, William J. Gallagher

Publikováno v: IEEE Transactions on Electron Devices. 67:3102-3108

To increase the density of magnetoresistive random access memory (MRAM) beyond the 1T1MTJ MRAM cell in use today, the design space for 1S1MTJ MRAM array is analyzed by cooptimizing both selectors and MTJs. Current low-resistance MTJs for 1T1MTJ MRAM

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::a7b75aedf4f84fec2910bbf1f7492530
https://doi.org/10.1109/ted.2020.3005118

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Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS2 Channel Directly Grown on SiO$_{{x}}$ /Si Substrates Using Area-Selective CVD Technology

Autor: Chao-Ting Lin, Kai-Shin Li, Wen-Bin Jian, Chao-Ching Cheng, Sheng-Kai Su, Chao-Hsin Chien, Jyun-Hong Chen, Lain-Jong Li, Tung-Yen Lai, Chen Tzu-Chiang, Ming-Yang Li, Chiang Hung-Li, Jia-Min Shieh, Chi-Feng Li, H.-S. Philip Wong, Kuan-Cheng Lu, Yun-Yan Chung

Publikováno v: IEEE Transactions on Electron Devices. 66:5381-5386

For high-volume manufacturing of 2-D transistors, area-selective chemical reaction deposition (CVD) growth is able to provide good-quality 2-D layers and may be more effective than exfoliation from bulk crystals or wet/dry transfer of large-area as-g

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::ff63a9035ccdd2bce1f895c45625cab8
https://doi.org/10.1109/ted.2019.2946101

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Monolithic Heterogeneous Integration of BEOL Power Gating Transistors of Carbon Nanotube Networks with FEOL Si Ring Oscillator Circuits

Autor: Lu Chun-Chieh, Chao-Ching Cheng, Lain-Jong Li, Chiang Hung-Li, Chen Tzu-Chiang, Tianqi Gao, H.-S. Philip Wong, Ang-Sheng Chou, Zheng Cui, Tsu-Ang Chao, Jianwen Zhao

Publikováno v: 2019 IEEE International Electron Devices Meeting (IEDM).

High performance carbon nanotube (CNT) network transistors with on-resistance (R on ) of DDQ ) and have the comparable active power (P ACTIVE ) consumption under the same operation frequency as compared to the operation without the power gating CNT t

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::c6fd48ce83e5c68ccec8ff1a7a1ecb88
https://doi.org/10.1109/iedm19573.2019.8993593

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Akademický článek

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Akademický článek

Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.

First demonstration of 40-nm channel length top-gate WS2 pFET using channel area-selective CVD growth directly on SiOx/Si substrate

Autor: Chen Tzu-Chiang, Jyun-Hong Chen, Chao-Ching Cheng, Tung-Yen Lai, Chiang Hung-Li, Yun-Yan Chung, Sheng-Kai Su, Chao-Ting Lin, Jia-Min Shieh, Lain-Jong Li, Chi-Feng Li, Chao-Hsin Chien, Kai-Shin Li, Uing-Yang Li, H.-S. Philip Wong

Publikováno v: 2019 Symposium on VLSI Technology.

Area-selective channel material growth for 2D transistors is more desirable for volume manufacturing than exfoliation or wet/dry transfer after large area growth. We demonstrate the first top-gate WS 2 p-channel field-effect transistors (p-FETs) fabr

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::e1c7d0057982eb7957e0c27afceae055
https://doi.org/10.23919/vlsit.2019.8776498

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