Zobrazeno 1 - 10
of 84
pro vyhledávání: '"Chia Pin Chiu"'
Autor:
Ravi Mahajan, Ankur Agrawal, James E. Jaussi, Joshua B. Fryman, Zhichao Zhang, Sandeep B. Sane, Arnab Sarkar, Priyanka Dobriyal, Chia-Pin Chiu, Srikant Nekkanty, Li Xiaoqian, Kaveh Hosseini, Thomas Nordstog, Suresh Pothukuchi, Pooya Tadayon, Susheel G. Jadhav, Sushrutha Gujjula, Vanessa Pogue, Abhishek Singh, Kemal Aygun, Nitin Deshpande, David Hui, Sergey Y. Shumarayev, Andrew Alduino
Publikováno v:
Journal of Lightwave Technology. 40:379-392
Photonics die or integrated photonics modules co-packaged with compute engines have the potential to deliver significant improvements in power, bandwidth and reach needed to meet the computing and communication demands of data centers and other high-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::db795559eb7a7ee45e925ae19a66e56f
https://doi.org/10.1109/jlt.2021.3104725
https://doi.org/10.1109/jlt.2021.3104725
Autor:
Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Daniel Jeong, Allen Chan, Austin Katzin, Songtao Liu, Radek Roucka, Manan Raval, Minh Mac, Chia-Pin Chiu, Thungoc Tran, Kumar Abhishek Singh, Sangeeta Raman, Yanjing Ke, Chen Li, Li-Fan Yang, Paulo Chao, Haiwei Lu, Fernando Luna, Xiaoqian Li, Tim Tri Hoang, Arnab Sarkar, Asako Toda, Ravi Mahajan, Nitin Deshpande, Conor O'Keeffe, Uma Krishnamoorthy, Vladimir Stojanovic, Chris Madden, Chong Zhang, Matt Sysak, Pavan Bhargava, Chen Sun, Mark Wade
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f822ffb5bae210bb30dea3887c1ae5fd
https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830221
https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830221
Publikováno v:
Thermal Science and Engineering Progress. 9:177-184
The approach proposed is a method for system level thermal transient calculation. The method is developed to predict the thermal behavior of an electronics system to optimize system performance while under thermal management control. The foundation o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5c75ead6e7521efee6ddb6c964909014
https://doi.org/10.1016/j.tsep.2018.11.013
https://doi.org/10.1016/j.tsep.2018.11.013
Autor:
Thungoc Tran, Mason Zhang, Chong Zhang, Uma Krishnamoorthy, Haiwei Lu, Mark T. Wade, Chia-Pin Chiu, Kaveh Hosseini, Pavan Bhargava, Li Xiaoqian, Ravi Mahajan, Sergey Y. Shumarayev, Sangeeta Raman, Arnab Sarkar, Edwin Kok, Nitin Deshpande, Asako Toda, Tim Tri Hoang, Conor O'Keeffe, Roy Meade, Vladimir Stojanovic, Kumar Abhishek Singh, Allen Chan, Ke Yanjing, Daniel Jeong, Chen Sun
Publikováno v:
OFC
The first 8 Tbps co-packaged FPGA with Silicon-Photonics IO is presented paving the way for co-packaged compute and optical-IO. The Multi-Chip Package integrates Stratix® 10 FPGA with up to five optical IO chiplets. © 2021 The Author(s).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::47376662d85f32b19158b43ef6565819
https://doi.org/10.1364/ofc.2021.th4a.2
https://doi.org/10.1364/ofc.2021.th4a.2
Publikováno v:
In Journal of the European Ceramic Society 2007 27(2):873-877
Publikováno v:
Journal of Manufacturing Systems. 37:505-510
In this paper, we present a novel AC-pulse modulated electrohydrodynamic (EHD) jet printing technology that enables high resolution fabrication of electrical features and interconnects using the silver nanoink on highly insulating substrates. In trad
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ee8838678c16e1da322e4519e1f393aa
https://doi.org/10.1016/j.jmsy.2014.07.005
https://doi.org/10.1016/j.jmsy.2014.07.005
Autor:
S. Yagnamurthy, Shaw Fong Wong, Haowen Liu, Steven A. Klein, Haehn Nicholas S, Pramod Malatkar, Shankar Devasenathipathy, Tannaz Harirchian, Chia-Pin Chiu, Seth B. Reynolds
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
Semiconductor packages undergo mechanical loading at various stages of the manufacturing, assembly and test process. Also, during the assembly of the thermal enabling solution in a system environment, mechanical loads are applied to ensure contact of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::767c8d05dbbcf0a02eca0cf2d2255ae0
https://doi.org/10.1109/ectc.2016.328
https://doi.org/10.1109/ectc.2016.328
Publikováno v:
Proceedings of the IEEE. 94:1476-1486
Increasing microprocessor performance has historically been accompanied by increasing power and increasing on-chip power density, both of which present a cooling challenge. In this paper, the historical evolution of power is traced and the impact of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c2daeaf316b55a8ccec39377a4643c41
https://doi.org/10.1109/jproc.2006.879800
https://doi.org/10.1109/jproc.2006.879800
Publikováno v:
Microelectronics International. 23:3-10
PurposeThis paper's purpose is to review the design of a flip chip thermal test vehicle.Design/methodology/approachDesign requirements for different applications such as thermal characterization, assembly process optimization, and product burn‐in s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e84429c6d3b42add307a581d55db641f
https://doi.org/10.1108/13565360610669959
https://doi.org/10.1108/13565360610669959
Autor:
J. Torresola, Abhay A. Watwe, Ravi Prasher, Gregory M. Chrysler, D. Grannes, Chia-Pin Chiu, Ravindranath V. Mahajan
Publikováno v:
IEEE Transactions on Advanced Packaging. 28:659-664
In the microelectronics industry, power has traditionally been the key driver for thermal management. Cooling solutions are typically rated in terms of their power dissipation capacity and efficiency. However, overall power is not the only parameter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9821337e0007f5970594f6f1709b78a7
https://doi.org/10.1109/tadvp.2005.858439
https://doi.org/10.1109/tadvp.2005.858439