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pro vyhledávání: '"Chi Ray Huang"'
Autor:
Lih-Yih Chiou, Chi-Ray Huang
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29:1586-1590
Write assists (WAs), such as negative bitline and collapse supply voltage (VDD), can effectively improve the write $V_{\text {min}}$ of static random access memory (SRAM) cells. The energy overhead associated with such assists is considerable due to
Autor:
Lih-Yih Chiou, Chi Ray Huang
Publikováno v:
IET Circuits, Devices & Systems. 12:713-719
This study proposes a single bit-line and disturbance-free static random-access memory (SRAM) cell for ultra-low voltage applications. SRAM cell with read-decoupled and cross-point structure addresses both the read-disturb and half-select stability i
Publikováno v:
VLSI-DAT
Read stability issues resulting from PVT variations are increasingly important when operating voltage entering the near-threshold region. An adaptive local column sensing keeper scheme is proposed to detect and generate an appropriate keeper current
Publikováno v:
ISCAS
Leakage power dissipation has become a major problem in advanced process technologies, especially in large SRAM designs. The use of adaptive techniques is a promising approach to decreasing power consumption through dynamic scaling of the supply volt
Publikováno v:
2016 2nd International Conference on Intelligent Green Building and Smart Grid (IGBSG).
This paper proposes a method to take advantage of the configurable capacitor array to cope with the input voltage instability caused by changes in ambient energy input variation. The proposed energy harvesting circuit can extend its input voltage to
Autor:
Lih-Yih Chiou, Chi-Ray Huang
Publikováno v:
2014 International SoC Design Conference (ISOCC).
The subthreshold level shifter is an indispensable circuit for ultra-low voltage systems to communicate with different power domains. In this paper, we present a limited-contention level shifter using non-ratioed cross-coupled structure instead of ra
Publikováno v:
ISCAS
Adaptive design is one of the most promising approaches for mitigating the large design margin used by dynamically scaling the supply voltage and frequency of integrated circuits. A low cost and power efficient variation detection circuit is one of t
Publikováno v:
VLSI-DAT
Lowering power consumption extends battery lifetime and reduces the battery size that determines the dimension of distributed sensor nodes. One of the effective low-power solutions is using subthreshold circuits. However, subthreshold circuits suffer
Publikováno v:
2013 International Symposium on Next-Generation Electronics.
Lowering supply voltage from super-threshold to sub-threshold is a promising approach for ultra-low energy applications. However, the degraded cell stability limits the voltage scalability of the conventional 6T SRAM. In this paper, we proposed a nov
Autor:
Chi-ray Huang, 黃啟睿
97
The emerging applications such as wireless sensor networks demanding for ultra low power consumption to prolong operating time without changing batteries are getting more and more attentions. Digital sub-threshold circuit design has become a
The emerging applications such as wireless sensor networks demanding for ultra low power consumption to prolong operating time without changing batteries are getting more and more attentions. Digital sub-threshold circuit design has become a
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/45507565541908832400