Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Cheryl Alix"'
Autor:
Yusuke Muraki, Yusuke Oniki, Pallavi P. Gowda, Efrain Altamirano-Sánchez, Hans Mertens, Naoto Horiguchi, Frank Holsteyns, Subhadeep Kal, Cheryl Alix, Kaushik Kumar, Aelan Mosden, Trace Hurd, Nobuyuki Takahashi
Publikováno v:
Advanced Etch Technology and Process Integration for Nanopatterning XI.
Autor:
Madhulika Korde, G. Andrew Antonelli, Alain C. Diebold, Aelan Mosden, Nick Keller, Subhadeep Kal, Cheryl Alix
Publikováno v:
Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV.
Here, we report the measurement of the dielectric spacer etch process for nanowire and nanosheet FET processes. A previously described Nanowire Test Structure (NWTS) was used for this study.[1, 2, 3] This structure has alternating Si/Si1-xGex/…/Si
Autor:
Subhadeep Kal, Karine Kenis, Trace Hurd, Yusuke Muraki, Peter Biolsi, Cheryl Alix, Aelan Mosden, Naoto Horiguchi, Yusuke Oniki, Frank Holsteyns, Kaushik A. Kumar, Efrain Altamirano-Sánchez, Chanemougame Daniel
Publikováno v:
Advanced Etch Technology for Nanopatterning IX.
R&D on transistor fabrication and scaling for current and future technology nodes involves various 3D-device architectures like the established finFET (fin “Field Effect Transistor”), and newer architectures like GAA (Gate All Around) which may i
Autor:
Nick Keller, Alain C. Diebold, Subhadeep Kal, Daniel F. Sunday, R. Joseph Kline, Aelan Mosden, Madhulika Korde, Cheryl Alix
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXIV.
The three-dimensional architectures for field effect transistors (FETs) with vertical stacking of Gate-all-Around Nanowires provide a pathway to increased device density and superior electrical performance. However, the transition from research into
Autor:
Andrew M. Greene, Aelan Mosden, Peter Biolsi, Cheryl Alix, Jeffrey Smith, Veeraraghavan S. Basker, Subhadeep Kal, Daniel Schmidt, Michael P. Belyansky, Koji Watanabe, Frougier Julien, Shanti Pancharatnam, Nicolas Loubet, Jingyun Zhang, Flaugh Matthew, Dechao Guo, Kai Zhao, Huimei Zhou, Maruf Bhuiyan, Balasubramanian S. Haran, Chanemougame Daniel, Miaomiao Wang, Curtis Durfee, Huiming Bu, Ivo Otto, Mary Breton
Publikováno v:
ECS Meeting Abstracts. :943-943
Horizontally stacked nanosheet gate-all-around devices enable area scaling of transistor technology, while providing improved electrostatic control over FinFETs for a wide range of channel widths within a single chip for simultaneous low power applic
Autor:
Alain C. Diebold, Subhadeep Kal, Madhulika Korde, Cheryl Alix, G. Andrew Antonelli, Nick Keller, Aelan Mosden
Publikováno v:
Journal of Vacuum Science & Technology B. 38:024007
Nondestructive measurement of three-dimensional subsurface features remains one of the most difficult and unmet challenges faced during the fabrication of three-dimensional transistor architectures, especially nanosheet and nanowire based field effec