Zobrazeno 1 - 10
of 169
pro vyhledávání: '"Cheong-Fat Chan"'
Autor:
Timothy Y Y Lai, Chi Pui Pang, Pancy Os Tam, Chen Zhao, David T. L. Liu, Sylvia W. Y. Chiang, Xin Zhang, Li Jia Chen, Cheong-Fat Chan
Publikováno v:
Eye. 27:1204-1213
Mutations in the SNRNP200 gene have been reported to cause autosomal dominant retinitis pigmentosa (adRP). In this study, we evaluate the mutation profile of SNRNP200 in a cohort of southern Chinese RP patients. Twenty adRP patients from 11 families
Publikováno v:
Analog Integrated Circuits and Signal Processing. 63:23-31
This paper presents a low voltage, 1.6 GHz integrated receiver front-end which is implemented by the standard 0.35 μm, 3M2P CMOS technology. The receiver consists of a transconductance low noise amplifier (Gm-LNA), a down conversion current mode mix
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 55:653-657
A band-selective low-noise amplifier (BS-LNA) for multiband orthogonal frequency-division multiplexing ultra-wide-band (UWB) receivers is presented. A switched capacitive network that controls the resonant frequency of the LC load for the band select
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 54:984-988
This paper presents a systematic, power-efficient design methodology for the complex finite state machine (FSM) implementation of H.264/AVC decoding. The proposed FSM orchestrates the decoding steps and predicts the type of incoming codeword based on
Autor:
Cheong-Fat Chan, Wang-Chi Cheng
Publikováno v:
Analog Integrated Circuits and Signal Processing. 51:141-144
A sub-1 V 1.6 GHz voltage-controlled oscillator (VCO) was designed and fabricated using 0.35 μm CMOS technology. This LC-based VCO can operate at a supply voltage as low as 0.8 V. A top-biased PMOS, with capacitor connected in parallel, is used in o
Publikováno v:
The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 47:223-232
This paper presents the design of a speech recognition IC using hidden Markov models (HMMs) with continuous observation densities. Results of offline and live recognition tests are also given. Our design employs a table look-up method to simplify the
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:1353-1363
Quadrature sampling of intermediate frequency (IF) signals is subject to the well-known problem of gain and phase mismatches between the in-phase (I) and quadrature (Q) channels. This paper presents an IF-input quadrature-sampling switched-capacitor
Publikováno v:
Analog Integrated Circuits and Signal Processing. 45:61-69
This manuscript presents a novel digital frequency tuning technique for integrated active RC filters. Unlike the traditional tuning approach of varying the values of the capacitors or resistors, the proposed technique achieves the tuning by varying t
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 23:1484-1491
This work examines the inherent self-checking (SC) property of latch-free dynamic asynchronous datapath (LFDAD) using differential cascode voltage switch logic. Consequently, a highly efficient SC dynamic asynchronous datapath architecture is present
Publikováno v:
The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology. 38:5-11
This paper presents a design of high speed curve interpolating D/A converter. We improve 8-bit data to 12-bit data, so the data resolution increases 16 times than that of original 8-bit data. The curve interpolator is developed from the linear interp