Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Chengwen Pei"'
Autor:
Michael V. Aquilino, Brian W. Messenger, Paul D. Agnello, Oh Jung Kwon, Bhupesh Chandra, T. Tzou, T. Kirahata, Shreesh Narasimha, Daniel J. Poindexter, S.S. Iyer, Erik A. Nelson, William Y. Chang, Geng Wang, K. V. Hawkins, Jaeger Daniel, Gregory G. Freeman, S. Rombawa, Chengwen Pei, Rajendran Krishnasamy, W. Davies, Karen A. Nummy, James P. Norum, Paul C. Parries, Norman Robson, Jinping Liu, X. Wang, Rajeev Malik, Christopher D. Sheraw, X. Chen, Jeffrey B. Johnson, Xin Li, W. Kong, Ming Yin, N. Arnold, Edward P. Maciejewski, Katsunori Onishi
Publikováno v:
2014 IEEE International Electron Devices Meeting.
This paper presents the industry's smallest Embedded Dynamic Random Access Memory (eDRAM) implemented in IBM's 22nm SOI technology. The bit cell area of 0.026µm2 achieves ∼60% scaling over the previous generation with deep trench (DT) capacitance
Autor:
E. Engbrecht, Edward P. Maciejewski, Christopher D. Sheraw, R. Divakaruni, Zhengwen Li, Allen H. Gabor, L. Economikos, Fernando Guarin, N. Zhan, H-K Lee, MaryJane Brodsky, Kenneth J. Stein, Siyuranga O. Koswatta, Y. Yang, Byeong Y. Kim, J. Hong, A. Bryant, Herbert L. Ho, Ruqiang Bao, Nicolas Breil, Babar A. Khan, E. Woodard, W-H. Lee, C-H. Lin, A. Levesque, Kevin McStay, V. Basker, Viraj Y. Sardesai, C. Tran, A. Ogino, Reinaldo A. Vega, C. DeWan, Shreesh Narasimha, J-J. An, Amit Kumar, A. Aiyar, Ravikumar Ramachandran, W. Wang, X. Wang, W. Nicoll, D. Hoyos, A. Friedman, Barry Linder, Yongan Xu, E. Alptekin, Cathryn Christiansen, S. Polvino, Han Wang, Scott R. Stiffler, G. Northrop, S. Saudari, J. Rice, Saraf Iqbal Rashid, Sunfei Fang, Michael V. Aquilino, Z. Ren, B. Kannan, Geng Wang, Noah Zamdmer, T. Kwon, Paul D. Agnello, Hasan M. Nayfeh, S. Jain, Robert R. Robison, M. Hasanuzzaman, J. Cai, L. Lanzerotti, D. Wehelle-Gamage, Basanth Jagannathan, J. Johnson, E. Kaste, Kai Zhao, Huiling Shang, Carl J. Radens, Shariq Siddiqui, Y. Ke, D. Ferrer, Ximeng Guan, D. Conklin, K. Boyd, K. Henson, Siddarth A. Krishnan, Bernard A. Engel, H. Dong, S. Mahajan, Unoh Kwon, Dominic J. Schepis, William Y. Chang, Liyang Song, Brian J. Greene, Chengwen Pei, S.-J. Jeng, Clevenger Leigh Anne H, Vijay Narayanan, C. Zhu, Wai-kin Li, Henry K. Utomo, Wei Liu, Dureseti Chidambarrao
Publikováno v:
2014 IEEE International Electron Devices Meeting.
We present a fully integrated 14nm CMOS technology featuring finFET architecture on an SOI substrate for a diverse set of SoC applications including HP server microprocessors and LP ASICs. This SOI finFET architecture is integrated with a 4th generat
Autor:
Gregory G. Freeman, Chengwen Pei, S.S. Iyer, J. Safran, Rajeev Malik, Geng Wang, Carl J. Radens, Paul C. Parries
Publikováno v:
2010 IEEE International SOI Conference (SOI).
The transition to multicore computing demands more embedded cache memories. Incorporating high performance eDRAMs into the cache hierarchy is an attractive solution. In this paper, we discuss the roles of SRAM, eDRAM and eFUSE OTPROM in a high perfor
Publikováno v:
Applied Physics Letters. 75:1-3
Based on total internal reflection and plasma dispersion effect, a SiGe/Si asymmetric optical waveguide switch with transverse injection structure has been proposed and fabricated. The switch performance is measured at the wavelength of 1.55 μm. A m
Publikováno v:
Applied Physics Letters. 74:1663-1665
Based on the plasma dispersion effect, a single-mode SiGe wavelength signal divider (WSD) integrated with infrared photodetectors for optical communication at the wavelengths of 1.3 and 1.55 μm is proposed and fabricated by molecular beam epitaxy. T
Autor:
S.S. Iyer, Kevin R. Winstel, C. Tanner, Lisa Y. Danbury Ninomiya, J. Faltermeier, T. Kirihata, Hyun-Chul Kim, Chengwen Pei, Xiaolin Li, Herbert L. Ho, Munir-ud-Din Naeem, D. Casarotto, David M. Dobuzinsky, P. Marchetti, K. Balasubramanyam, R. Deschner, R. Zhang, John Benedict, Paul C. Parries, MaryJane Brodsky, W. Kong, Babar A. Khan, Kangguo Cheng, A. Kniffm, Y. Feng, J. Barth, C. Norris, J. Yates, James P. Norum, D. Parise, J. Cai, Kevin McStay, Scott D. Allen, Geng Wang
Publikováno v:
2006 International Electron Devices Meeting.
The authors present a 65nm embedded DRAM cell (0.127 μm2 cell size) on unpatterned SOI fabricated using standard high performance SOI technology with dual stress liner (DSL). The cell utilizes a low-leakage 2.2-nm gate oxide pass transistor and a de
Autor:
Chengwen Pei, Booth, R., Ho, H., Kusaba, N., Xi Li, Brodsky, M.-J., Parries, P., Huiling Shang, Divakaruni, R., Iyer, S.
Publikováno v:
2008 9th International Conference on Solid-State & Integrated-Circuit Technology; 2008, p1146-1149, 4p
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.