Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Cheng-Lian Peng"'
Publikováno v:
FPT
As a promising computing platform for stream processing, partially reconfigurable systems have shown their hardware efficiency and reconfiguration flexibility. This paper presents a partially reconfigurable architecture supporting hardware threads. I
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b90309fe00ec9e9b12947ac50ec1c061
https://doi.org/10.1109/fpt.2012.6412147
https://doi.org/10.1109/fpt.2012.6412147
Publikováno v:
ICESS
Nowadays, one of the challenges for creating a mixed hardware/software application on dynamically reconfigurable SoC is how to provide a unified programming model for hybrid hardware/software tasks and a portable interface adaptation for dynamically
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5cc8780349544ba19f62ca950a913526
https://doi.org/10.1109/icess.2009.56
https://doi.org/10.1109/icess.2009.56
Publikováno v:
ICESS
Reconfigurable system provides both flexibility of software and performance of hardware. It is a significant trend in embedded application domain. Some new reconfigurable technologies and technology-dependent tools have been developed, but the whole
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bf99e4d25775ee81739cdffe77830ed4
https://doi.org/10.1109/icess.2009.84
https://doi.org/10.1109/icess.2009.84
Publikováno v:
2008 International Conference on Embedded Software and Systems Symposia.
Dynamic partial reconfigurable embedded system includes at least one reconfigurable device, which is emerging as the new paradigm for satisfying the simultaneous demand for application performance and flexibility. But it brings difficulties in debugg
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::60b44335df273f4832de50e64a20d116
https://doi.org/10.1109/icess.symposia.2008.10
https://doi.org/10.1109/icess.symposia.2008.10
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540927181
CSCWD (Selected Papers)
CSCWD (Selected Papers)
In heterogeneous reconfigurable systems including FPGA and CPU, besides software tasks and hardware tasks, there exist hybrid tasks which can be either executed on CPU as software tasks or implemented on FPGA as hardware tasks. This paper mainly focu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bbd2b56b48da273bd873f295521159d4
https://doi.org/10.1007/978-3-540-92719-8_54
https://doi.org/10.1007/978-3-540-92719-8_54
Publikováno v:
ICESS
Dynamic reconfiguration for fine-grained architectures is still associated with significant reconfiguration costs. In this paper, a new placement algorithm is proposed to reduce the size of FPGA reconfiguration bitstream. The algorithm is modified on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::43d097b897c86ba5af5307020e910dd0
https://doi.org/10.1109/icess.2008.20
https://doi.org/10.1109/icess.2008.20
Publikováno v:
CIT
Multimedia processor designers are always challenged by performance, cost and flexibility. Due to the technological advance in FPGA, one of the promising solutions is to enable dynamically reconfigurable SoC in multimedia application. This paper util
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d4b4ac58e75ab9937bef391c1dfff69b
https://doi.org/10.1109/cit.2007.30
https://doi.org/10.1109/cit.2007.30
Publikováno v:
CSCWD
This paper mainly discusses online tasks scheduling problem on hybrid CPU-FPGA reconfigurable systems. In these systems, hybrid tasks may be binary codes executed on CPU as well as hardware logic circuits implemented on FPGA. Tasks scheduling algorit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aac03ccef36d25d3104fb2fe5e5854a4
https://doi.org/10.1109/cscwd.2007.4281589
https://doi.org/10.1109/cscwd.2007.4281589
Publikováno v:
FPT
Efficient task scheduling is very important for obtaining high performance in reconfigurable computing system. Previous researches mostly concentrate on the spatial placement of tasks, and did not pay enough attention to temporal factors. This paper
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cce015401b7ad2a309d2061c68c6d6e8
https://doi.org/10.1109/fpt.2006.270295
https://doi.org/10.1109/fpt.2006.270295
Publikováno v:
IMSCCS (2)
With the improvement of SoC design flow, early system prototype is an efficient way in which designers can find function bugs and performance limitations. The SystemC transaction-level model, a high level system model, has been attracted great attent
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::217fb1f83862774b08c2c9b902de8800
https://doi.org/10.1109/imsccs.2006.273
https://doi.org/10.1109/imsccs.2006.273