Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Cheng-Fu Hsu"'
Autor:
Cheng-Fu Hsu, 許成輔
98
In development of high-speed circuits, the data rates of clock are faster and faster. Signal integrity is respected at receiver. Further, there are almost using differential signal pairs in high-speed circuits, which not only maintain satisfa
In development of high-speed circuits, the data rates of clock are faster and faster. Signal integrity is respected at receiver. Further, there are almost using differential signal pairs in high-speed circuits, which not only maintain satisfa
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/v6r3bm
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 4:134-144
This paper presents a comprehensive investigation on an inexpensive and wideband common-mode noise suppression filter that uses a quarter-wavelength resonator. An equivalent transmission line model is also used to evaluate the effectiveness of the pr
Publikováno v:
19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems.
This work presents a novel, inexpensive and wideband common-mode noise suppression filter by using quarter-wavelength resonator. The quarter-wavelength resonator can provide a shorting path for common-mode return current of differential interconnects
Autor:
Cheng-Fu Hsu
Publikováno v:
SPIE Proceedings.
In the manufacture of integrated circuit device, it is necessary to maintain an ultra clean wafer surface in order to obtain high quality device. NH4OH-H2O2(APM), HCL- H2O2(HPM), and H2SO4-H2O2(SPM) are efficient in removing organic or metallic impur
Publikováno v:
SPIE Proceedings.
In the modern VLSI manufacture, the process control to eliminate yield loss can not be over-emphasized in multilevel integration circuit manufacture. The scrubber clean is widely used to remove the particles for yield improvement. When the wafers run
Publikováno v:
SPIE Proceedings.
In the modern VLSI manufacture, the quality of the silicon raw wafer can not be over-emphasized in multilevel integration circuit manufacture. The silicon raw wafers induced low yield issue including particles, contamination residue and IDDQ failure
Publikováno v:
2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging & Systems (EPEPS); 2010, p257-260, 4p