Zobrazeno 1 - 10
of 24
pro vyhledávání: '"Cheng Wen Kuo"'
Autor:
Min-An Tsai, Cheng-Yeh Yu, Ta-Ming Kuan, Li-Guo Wu, Chueh Wei-Lo, Yi-Han Chao, Cheng-Wen Kuo, Hsin-Hsin Hsieh
Publikováno v:
2019 IEEE 46th Photovoltaic Specialists Conference (PVSC).
The combination-accelerated stress test for 4 solar cell mini modules is effective for accelerating degradation phenomena observed for those modules exposed outside. The combination test include high fidelity ultraviolet (UV) light exposure, copper a
Publikováno v:
physica status solidi (a). 213:2259-2263
Light harvesting by indium oxide nanowires (InO NWs) as an antireflection layer on multi-crystalline silicon (mc-Si) solar cells has been investigated. The low-temperature growth of InO NWs was performed in electron cyclotron resonance (ECR) plasma w
Publikováno v:
2018 IEEE 7th World Conference on Photovoltaic Energy Conversion (WCPEC) (A Joint Conference of 45th IEEE PVSC, 28th PVSEC & 34th EU PVSEC).
A passivated emitter and rear cell (PERC) combined with a selective emitter (SE) structure has been fabricated using screen-printable polymer pastes as wet chemical etch masks. This research work is devoted to the development of organic paste composi
Publikováno v:
2018 IEEE 7th World Conference on Photovoltaic Energy Conversion (WCPEC) (A Joint Conference of 45th IEEE PVSC, 28th PVSEC & 34th EU PVSEC).
In this work, we proposed the different laserdoped selective emitters (LDSE) parameters for the industrial mono silicon solar cell applied to screen-printed passivated emitter and rear cell (PERC) structure. We compared the 156.75 × 156.75 mm2 p-typ
Publikováno v:
2016 IEEE 43rd Photovoltaic Specialists Conference (PVSC).
In this paper, we proposed the high performance mono silicon PERC solar cells by using industrial mass production technology. Using the optimized back side passivation and pattern design on commercially available 156 mm × 156 mm p-type Czochralski-g
Autor:
San-Lein Wu, Cheng-Wen Kuo, Yao-Tsung Huang, Shoou-Jinn Chang, Yao-Chin Cheng, Osbert Cheng, Ya-Ting Chen
Publikováno v:
IEEE Transactions on Nanotechnology. 10:1053-1058
Implementation of strained-Si MOSFETs with optimum low-cost stress-memorization technique for a 40-nm technology CMOS process was demonstrated. Devices fabricated on (1 0 0) substrate with 〈1 0 0〉channel orientation provide additional 8% current
Autor:
Chin-Kai Hung, Cheng Tung Huang, Osbert Cheng, Yao-Tsung Huang, Tzu-Juei Wang, Shoou-Jinn Chang, San-Lein Wu, Cheng-Wen Kuo
Publikováno v:
IEEE Transactions on Nanotechnology. 10:433-438
This paper reports an improved densification anneal process for sub-atmospheric chemical vapor deposition (SACVD)-based shallow trench isolation (STI) to enhance CMOSFETs performance for 40-nm node and beyond. The improved STI densification process i
Publikováno v:
Solid-State Electronics. 53:905-908
Utilizing chemical–mechanical-polishing (CMP) technique to reduce oxide interface defects and roughness induced from SiGe virtual substrate in strained-Si nMOSFETs has been investigated. Due to the smoother SiO 2 /Si interface, an additional 3.5% d
Publikováno v:
Solid-State Electronics. 53:897-900
We investigate and compare the effects of silicon thicknesses on interface characteristics in strained-Si nMOSFET fabricated on SiGe virtual substrate. Ge out-diffusion effect and slight strain relaxation in Si-cap layer are observed with capacitance
Publikováno v:
2015 IEEE 42nd Photovoltaic Specialist Conference (PVSC).
In this work, we proposed the impact of the rear laser process design applied to screen-printed passivated emitter and rear cell (PERC) structure. We compared different laser pattern design 1) line (reference), 2) Dash (2∶1), and 3) Dash (5∶1) on