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Autor:
Chen Chao-Cheng Lee, Chao-Chang Chiu, Ke-Horng Chen, Moris Lin, Tsung-Yen Tsai, Po Hsien Huang, Ying-Hsi Lin
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 62:59-69
The proposed resistance-locked loop (RLL) can achieve high PSRR of $-$ 16 dB digital low dropout (DLDO) regulator without consuming much power which is the drawback in prior arts. Even at light loads, the RLL can be shut down for power saving. Furthe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aca13d97a83a2f8f1b03155f3a35b6b5
https://doi.org/10.1109/tcsi.2014.2342380
https://doi.org/10.1109/tcsi.2014.2342380
