Zobrazeno 1 - 10
of 45
pro vyhledávání: '"Che Wei Tsao"'
Publikováno v:
ACM Transactions on Embedded Computing Systems. 21:1-21
In the big data era, a huge number of services has placed a fast-growing demand on the capacity of DRAM-based main memory. However, due to the high hardware cost and serious leakage power/energy consumption, the growth rate of DRAM capacity cannot me
Publikováno v:
South African Journal of Industrial Engineering. 34
Driven by the total cost of ownership, US–China trade and technology competition, and the COVID-19 pandemic, global supply chains are undergoing a major restructuring that will soon transform business and economics all over the world. Recently, sup
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39:1286-1299
Due to the ever-growing demands of larger capacity of flash storage devices, various new manufacturing techniques have been proposed to provide high-density and large-capacity NAND flash devices. Among these new techniques, 3-D NAND flash is regarded
Autor:
Yu-Ming Chang, Chien-Chung Ho, Che-Wei Tsao, Shu-Hsien Liao, Wei-Chen Wang, Tei-Wei Kuo, Yuan-Hao Chang
Publikováno v:
Proceedings of the 37th ACM/SIGAPP Symposium on Applied Computing.
Publikováno v:
2021 IEEE 10th Non-Volatile Memory Systems and Applications Symposium (NVMSA).
Autor:
Xue Liu, Che-Wei Tsao, Yu-Chen Lin, Tei-Wei Kuo, Tse-Yuan Wang, Jian-Jia Chen, Yuan-Hao Chang
Publikováno v:
RACS
With the trend of 3D architecture and higher access rate, Phase Change Memory (PCM) storage devices face the overheating issue. This work is motivated by the observation that PCM devices might change states of memory cells with high temperature, and
Autor:
Che-Wei Tsao, Chun-Kong Law
Publikováno v:
Operators and Matrices. :363-373
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26:1518-1530
In the big data era, data-intensive applications have growing demand for the capacity of DRAM main memory, but the frequent DRAM refresh, high leakage power, and high unit cost bring serious design issues on scaling up DRAM capacity. To address this
Publikováno v:
SID Symposium Digest of Technical Papers. 49:823-826
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 35:1425-1434
The high cell density, multilevel-cell programming, and manufacturing process variance force the new coming flash memory to have large bit-error-rate variance among blocks and pages, where a flash chip consists of multiple blocks and each block consi