Zobrazeno 1 - 10
of 77
pro vyhledávání: '"Chayanika Bose"'
Autor:
Banibrata Bag, Akinchan Das, Imran Shafique Ansari, Ales Prokes, Chayanika Bose, Aniruddha Chandra
Publikováno v:
IEEE Photonics Journal, Vol 10, Iss 3, Pp 1-17 (2018)
Free-space optical (FSO) links are considered as cost-effective, noninvasive alternative to fiber optic cables for 5G cellular backhaul networking. For FSO-based backhaul networks, we propose an additional millimeter-wavelength (MMW) radio-frequency
Externí odkaz:
https://doaj.org/article/053bda4c537849f2887167b1ad436e80
Autor:
Chaitali Chakraborty, Chayanika Bose
Publikováno v:
Journal of Advanced Dielectrics, Vol 6, Iss 1, Pp 1650001-1-1650001-5 (2016)
The influence of single and double layered gold (Au) nanocrystals (NC), embedded in SiO2 matrix, on the electrical characteristics of metal–oxide–semiconductor (MOS) structures is reported in this communication. The size and position of the NCs a
Externí odkaz:
https://doaj.org/article/fef44ddcc3d34bca9d6352a11cc06c2c
Autor:
Madhupriya Samanta, Shrabani Ghosh, Moumita Mukherjee, Biswajit Das, Chayanika Bose, Kalyan K. Chattopadhyay
Publikováno v:
International Journal of Hydrogen Energy. 47:6710-6720
Publikováno v:
Silicon. 14:7157-7168
The paper illustrates the performance of Tri-Gate (TG) Dual Material (DM) SOI (Silicon on Insulator) Junctionless (JL) FET operating in Junction Accumulation Mode (JAM). An analytical model is developed to evaluate its performance. The device is also
Publikováno v:
Silicon. 13:375-387
This paper presents an analytical modeling of a separated gate underlap graded N-channel FET to assess the short-channel effects. A 2D modeling scheme is employed to derive its surface potential, threshold voltage, subthreshold current and DIBL. The
Publikováno v:
Journal of Computational Electronics. 19:688-699
The graded n-channel underlap fin-shaped field-effect transistor (FinFET) provides ample scope for future investigation. This device and the effects of the underlap, gate length, and doping concentration of the short channel are analyzed herein using
Publikováno v:
IET Circuits, Devices & Systems. 13:337-343
Double-gate MOSFET with graded channel doping is studied in this work, where the source and drain ends of the channel are doped with different concentrations to yield two different versions of the above device namely high-low (HL) and low-high (LH).
Publikováno v:
2021 Devices for Integrated Circuit (DevIC).
The present paper describes the influence of Gate stacking on Dual Material (DM) Junctionless (JL) SOI MOSFET operating in Junction Accumulation Mode(JAM). The performance of the proposed MOSFET structure, simulated with 2D ATLAS device simulator, is
Publikováno v:
VTC Spring
In this paper, we have analyzed the average bit error rate (ABER) performance of a multiple-input-multiple-output (MIMO) free-space optical (FSO) communication link employing both transmitter and receiver diversity techniques. For the proposed MIMO F
Publikováno v:
VTC Spring
The WiGig Alliance has recently introduced IEEE 802.11ay that standardizes the use of 60 GHz millimeter-wave (mmWave) frequency band for providing Gbps wireless connectivity on the move. However, for vehicle-to-infrastructure (V2I) systems using such