Výsledky vyhledávání - "Charles W. Koburger"

Integration of chemical-mechanical polishing into CMOS integrated circuit manufacturing

Autor: Micheal Leach, William J. Cote, Stephen E. Luce, Carter Welling Kaanta, William R. Hill, Howard S. Landis, Charles W. Koburger, Cheryl A. Hoffman, Walter Frederick Lange, Peter J Burke

Publikováno v: Thin Solid Films. 220:1-7

Planarization by chemical-mechanical polishing (CMP) has been exploited by IBM in the development and manufacture of CMOS products since 1985. Among the products that use this technology are the 4-Mbit DRAM (which uses polysilicon, oxide, tungsten-li

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::1003ff4a79d21c8b67203fc279ce44c8
https://doi.org/10.1016/0040-6090(92)90539-n

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Robust and low cost copper contact application for low power device at 32 nm-Node and beyond

Autor: James Ren, James J. Kelly, M. Fujiwara, Takamasa Usui, Kazunari Ishimaru, Terry A. Spooner, Sunny Chiang, Tuan Vo, T. Watanabe, Mariko Takayanagi, Atsunobu Isobayashi, Charles W. Koburger, J. Maniscalco

Publikováno v: 2009 IEEE International Interconnect Technology Conference.

We have demonstrated the complete copper filling of contact structures at 32 nm- and 22 nm-node dimensions with the conventional PVD only Ta(N)/Cu barrier/seed process. Copper seed process was optimized to obtain the sufficient coverage of copper alo

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::72f876202ad36a9abfe6c2156fb72fdb
https://doi.org/10.1109/iitc.2009.5090325

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Copper contact metallization for 22 nm and beyond

Publikováno v: 2009 IEEE International Interconnect Technology Conference.

We used Cu contact metallization to solve one of the critical challenges for 22 nm node technology. Cu contact metallization allowed us to demonstrate world's smallest and fully functional 22 nm node 6T-SRAM [1]. Cu contact metallization was executed

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::cbc47203e66dd598711949bcf80c4e73
https://doi.org/10.1109/iitc.2009.5090326

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A variable-stress shallow trench isolation (STL) technology with diffused sidewall doping for submicron CMOS

Autor: W. Noble, James D. Warnock, Charles W. Koburger, B. Davari, A.C. Megdanis, J.L. Mauer, Toshiharu Furukawa, Yuan Taur

Publikováno v: Technical Digest., International Electron Devices Meeting.

A shallow trench isolation (STI) technology, RIE (reactive ion etching), CVD (chemical vapor deposition) oxide fill, and polarization are used to realize lithography-limited, submicron device and isolation dimensions. A novel boron diffusion techniqu

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::44ae3ad7cd74d96af18c8b1a1d15d705
https://doi.org/10.1109/iedm.1988.32759

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Simple, fast, 2.5-V CMOS logic with 0.25-μm channel lengths and damascene interconnect

Autor: J. Lee, Heon Lee, Charles W. Koburger, H. Hansen, S. Luce, J. Givens, William F. Clark, S. Holmes, Bijan Davari, D. Martin, S. Geissler, S. Mittl, J. Nakos, Scott R. Stiffler, James W. Adkisson

Publikováno v: Proceedings of 1994 VLSI Technology Symposium.

An advanced half-micron CMOS technology is demonstrated. Devices with 0.25-/spl mu/m channel lengths provide high speed. Reduced supply voltage is employed to provide reliability with low-cost processing. A damascene tungsten interconnect fabricated

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::002171d17a81645f82f20333bc87e236
https://doi.org/10.1109/vlsit.1994.324443

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