Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Charles Meissner"'
Autor:
Charles Meissner, Wisam Kadry, Randall R. Pratt, Anatoly Koyfman, Thompto Brian W, Brett Adam St. Onge, Daniel Hershcovich, Mike Schiffli, Avi Ziv, Allon Adir, Elena Tsanko, Oz Hershkovitz, Karen Holtz, Hickerson Bryan G, John M. Ludden, Dave Goodman, Amir Nahir
Publikováno v:
DAC
Transactional memory is a promising mechanism for synchronizing concurrent programs that eliminates locks at the expense of hardware complexity. Transactional memory is a hard feature to verify. First, transactions comprise several instructions that
Publikováno v:
DAC
The growing importance of post-silicon validation in ensuring functional correctness of high-end designs has increased the need for synergy between the pre-silicon verification and post-silicon validation. This synergy starts with a common verificati
Autor:
Allon Adir, Shady Copty, Gil Shurek, Charles Meissner, Shimon Landa, Avi Ziv, Schumann John A, Amir Nahir
Publikováno v:
DATE
The growing importance of post-silicon validation in ensuring functional correctness of high-end designs increases the need for synergy between the pre-silicon verification and post-silicon validation. We propose a unified functional verification met
Publikováno v:
Hardware and Software: Verification and Testing ISBN: 9783642195822
Haifa Verification Conference
Haifa Verification Conference
Obtaining coverage information in post-silicon validation is a difficult task. Adding coverage monitors to the silicon is costly in terms of timing, power, and area, and thus even if feasible, is limited to a small number of coverage monitors. We pro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a38ccca2d25d007c7641ed030c0ebcba
https://doi.org/10.1007/978-3-642-19583-9_10
https://doi.org/10.1007/978-3-642-19583-9_10
Autor:
Leitner Lawrence, S. M. German, Jackson Jonathan, Fady Copty, Richard D. Peterson, Schumann John A, Randall R. Pratt, Michal Rimon, Johannes Koesters, Amir Nahir, Klaus-Dieter Schubert, Holger Horbach, Bishop Brock, Oz Hershkovitz, Jörg Behrend, John M. Ludden, G. B. Meil, Charles Meissner, S. Ayub, Ronny Morad, Klaus Keuerleber, Viresh Paruthi
Publikováno v:
IBM Journal of Research and Development. 59:11:1-11:17
This paper describes methods and techniques used to verify the POWER8™ microprocessor. The base concepts for the functional verification are those that have been already used in POWER7® processor verification. However, the POWER8 design point prov
Autor:
Charles Meissner, John M. Ludden, Schumann John A, James P. Hsu, Jacob Buchert, Jackson Jonathan, Michael L. Behm, Wolfgang Roesner, Bishop Brock, Avi Ziv, Klaus-Dieter Schubert, Viresh Paruthi, Johannes Koesters
Publikováno v:
IBM Journal of Research and Development. 55:10:1-10:17
This paper describes the methods and techniques used to verify the POWER7® microprocessor and systems. A simple linear extension of the methodology used for POWER4®, POWER5®, and POWER6® was not possible given the aggressive design point and sche