Zobrazeno 1 - 10
of 78
pro vyhledávání: '"Charles F. Hawkins"'
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 16:686-695
Burn-in is a quality improvement procedure challenged by the high leakage currents that are rapidly increasing with IC technology scaling. These currents are expected to increase even more under the new burn-in environments leading to higher junction
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11:863-870
Technology scaling challenges the effectiveness of current-based test techniques such as I/sub DDQ/. Furthermore, existing leakage reduction techniques are not as effective in aggressively scaled technologies. We exploited intrinsic dependencies of t
Autor:
Edward I. Cole, Paiboon Tangyunyong, Charles F. Hawkins, Michael R. Bruce, Victoria J. Bruce, Rosalinda M. Ring, Wan-Loong Chong
Publikováno v:
EDFA Technical Articles. 4:11-16
Resistive interconnections, a type of soft failure, are extremely difficult to find using existing backside methods, and with flip-chip packages, alternative front side approaches are of little or no help. In an effort to address this challenge, a te
Autor:
S. Narendra, Ali Keshavarzi, Manoj Sachdev, Kaushik Roy, Vivek De, Charles F. Hawkins, James W. Tschanz, W.R. Daasch
Publikováno v:
IEEE Design & Test of Computers. 19:36-43
Barriers to technology scaling, such as leakage and parameter variations, challenge the effectiveness of current-based test techniques. This correlative multiparameter test approach improves current testing sensitivity, exploiting dependencies of tra
Autor:
Ravi K. Gulati, Charles F. Hawkins
Power supply current monitoring to detect CMOS IC defects during production testing quietly laid down its roots in the mid-1970s. Both Sandia Labs and RCA in the United States and Philips Labs in the Netherlands practiced this procedure on their CMOS
Publikováno v:
CMOS Integrated Digital Electronics: A First Course ISBN: 9781613530023
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5d21292dd30d7ba9d9be5d40a9eec993
https://doi.org/10.1049/sbcs501e_ch5
https://doi.org/10.1049/sbcs501e_ch5
Publikováno v:
Journal of Electronic Testing. 8:229-239
The characteristics of devices with gate oxide short defects are investigated for both n-MOS and p-MOS transistors. Experimental results obtained from real and design induced gate oxide shorts are presented analyzing the defect-induced conduction mec
Publikováno v:
Journal of Electronic Testing. 3:291-303
Quiescent power supply current (I DDQ ) testing of CMOS integrated circuits is a technique for production quality and reliability improvement, design validation, and failure analysis. It has been used for many years by a few companies and is now rece
Publikováno v:
Gizopoulos / Advances in ElectronicTesting ISBN: 9780387294087
CMOS technology scaling has been a constant since its initial development in the early 70’s as an effort to obtain ICs working at higher operating frequencies that perform more operations per unit area. Each advance in CMOS technology scaling is ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d2b99198f8b3a738879771b0c4ac5b9e
https://doi.org/10.1007/0-387-29409-0_2
https://doi.org/10.1007/0-387-29409-0_2