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pro vyhledávání: '"Chang-Gyu Hwang"'
Autor:
Chang-Gyu Hwang
Publikováno v:
Proceedings of the IEEE. 9:1765-1771
As we enter the nanotechnology era, a big shift in paradigm comes to the memory industry. The traditional computer industry for dynamic RAM is expected to mature its memory-bit consumption with a relatively low growth rate. Meanwhile, the memory cons
Autor:
Chang-Gyu Hwang
Publikováno v:
IEEE Circuits and Devices Magazine. 17:12-18
In this article, the trends of the semiconductor memory market and the challenges of deep-submicron and nanometer silicon technology in the 21st century are introduced.
Publikováno v:
IEEE Transactions on Electron Devices. 45:598-608
Many challenges emerge as the DRAM enters into a generation of the gigabit density era. Most of the challenges come from the shrink technology which scales down minimum feature size by a factor of 0.84 per year. The need for higher performance to nar
Publikováno v:
Microelectronics Journal. 27:777-783
The production of future generation DRAM devices critically requires R&D of process technologies for highly integrable and cost effective processes. Also, in order to support the ever-increasing requirements for high performance operation, the future
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 13:899-908
A two-dimensional device simulator SNU-2D based on the hydrodynamic model is developed for the simulation and analysis of submicron devices. The simulator has the capacity for both self-consistent steady-state and transient-state simulation. To obtai
Autor:
Chang-Gyu Hwang
Publikováno v:
2006 International Electron Devices Meeting.
The advances in silicon technology that have been the backbone of tremendous previous growth, was foreseen in 1965 when Gordon Moore published his famous prediction about the constant growth rate of chip complexity. And, in fact, it has repeatedly be
Autor:
Chan Jong Park, Jung-Hwa Lee, Sei Seung Yoon, Hyung-Dong Kim, Dong Il Seo, Ejaz Haq, Byung-Chul Kim, Seung-Moon Yoo, Jeong Se-Jin, Chang Gyu Hwang, Tae-Seong Jang, Jin Man Han, Chang Sik Choi, Soo-In Cho
Publikováno v:
Proceedings of 1994 IEEE Symposium on VLSI Circuits.
A 256M DRAM featuring register controlled low power self refresh without toggling of internal addresses or predecoders, activation of all row lines in quick succession for rapid burn-in at wafer level and hierarchical I/O line scheme with flexible re
Autor:
Chang-Gyu Hwang
Publikováno v:
2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).
Information technology (IT) emerged from the 1970s based on main-frame computers. Since then, PCs and the Internet world have drastically expanded the IT industry along with rapid growth of network and communication technology. For almost all platfor
Autor:
Hongsik Jeong, Kinam Kim, Heung Soo Park, Yeong-kwan Kim, Chang Gyu Hwang, Won Suk Yang, Kyu Hyun Lee, Sang-In Lee, Soo Ho Shin, T.Y. Chung, Jong-Ho Lee, Moon Yong Lee, Wonseok Lee
Publikováno v:
1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).
A novel integration technology with capacitor over metal (COM) for 0.15 /spl mu/m stand-alone and embedded DRAMs is developed using a self-aligned dual damascene (SADD) process, which offers great breakthroughs. First, many back-end metallization iss
Autor:
D. Chin, Chang Gyu Hwang, Huichul Shin, K. Kim, W.M. Park, Sangwoo Shim, C.S. Choi, J. H. Shin, Sutae Kim, Ohyun Kwon, Young-Kwan Park, Jung-Chak Ahn, S. W. Nam
Publikováno v:
1992 Symposium on VLSI Technology Digest of Technical Papers.
Micro villus patterning (MVP) technology which delivers the maximized cell capacitance is discussed. The key feature of the MVP technology is the formation of a hemispherical grain (HSG) archipelago and its transference to the underlayered oxide. The