Zobrazeno 1 - 10
of 38
pro vyhledávání: '"Chandramouli V. Kashyap"'
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 23:1661-1669
For optimizations like physical synthesis and static timing analysis, efficient interconnect delay and slew computation is critical. Since one cannot often afford to run asymptotic waveform evaluation (Pillage and Rohrer, 1990), constant time solutio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::363be2b746e1da16576dd3d17d3f8512
https://doi.org/10.1109/tcad.2004.837727
https://doi.org/10.1109/tcad.2004.837727
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 23:509-516
Recent years have seen significant research in finding closed form expressions for the delay of an RC circuit that improves upon the Elmore delay model. However, several of these formulae assume a step excitation, leaving it to the reader to find a s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::16f4ba9e0ce5c6c6d3f0d31d85fbfe0c
https://doi.org/10.1109/tcad.2004.825861
https://doi.org/10.1109/tcad.2004.825861
Publikováno v:
ICCAD
Physical design optimizations such as placement, interconnect synthesis, floorplanning, and routing require fast and accurate analysis of RC networks. Because of its simple close form and fast evaluation, the Elmore delay metric has been widely adopt
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::117c03356148a888f5df397ff7752454
https://doi.org/10.1109/tcad.2004.823343
https://doi.org/10.1109/tcad.2004.823343
Autor:
Chandramouli V. Kashyap, Charles J. Alpert, G. Gandham, Miloš Hrkić, Stephen T. Quay, Jiang Hu, Chris Chu
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 23:136-141
To achieve timing closure in a placed design, buffer insertion and driver sizing are two of the most effective transforms that can be applied. Since the driver-sizing solution and the buffer-insertion solution affect each other, suboptimal solutions
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5f2bbd9bde801f3cf2ac7661cfbf4778
https://doi.org/10.1109/tcad.2003.819910
https://doi.org/10.1109/tcad.2003.819910
Publikováno v:
DAC
We present a noise-driven effective capacitance method for estimating the combined propagation noise and crosstalk noise. Gate propagation noise rules are efficiently calculated inside the Ceff procedure to determine a linear Thevenin model of the vi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ce7681337f02409c21c046085df0f3b1
https://doi.org/10.1109/dac.2005.193798
https://doi.org/10.1109/dac.2005.193798
Publikováno v:
DAC
For optimizations like physical synthesis and static timing analysis, efficient interconnect delay and slew computation is critical. Since one cannot often afford to run AWE[12], constant time solutions are required. This work presents the first comp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::733c4459e698b966f4ae4eea95fcdaf2
https://doi.org/10.1145/775832.775932
https://doi.org/10.1145/775832.775932
Publikováno v:
ISPD
Recent years have seen significant research in finding closed form expressions for the delay of an RC circuit that improves upon the Elmore delay model. However, several of these formulae assume a step excitation, leaving it to the reader to find a s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4e54bbb702adb4559cd48acae31bb585
https://doi.org/10.1145/640000.640009
https://doi.org/10.1145/640000.640009
Autor:
Charles J. Alpert, Chris Chu, Miloš Hrkić, Chandramouli V. Kashyap, G. Gandham, Jiang Hu, Stephen T. Quay
Publikováno v:
ISPD
To achieve timing closure in a placed design, buffer insertion and driver sizing are two of the most effective transforms that can be applied. Since the driver sizing solution and the buffer insertion solution affect each other, sub-optimal solutions
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7e9b236951af16f8ee7a85fc1ae44ac
https://doi.org/10.1145/505388.505414
https://doi.org/10.1145/505388.505414
Publikováno v:
ISPD
An efficient method for optimizing RC circuit design to reduce delay. The method comprises: calculating a first moment and a second moment of impulse response for an RC circuit; (2) computing a delay value for each node of the RC circuit utilizing th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::96acb94e702084783a0cb54979083709
https://doi.org/10.1145/332357.332377
https://doi.org/10.1145/332357.332377
Publikováno v:
DAC
In this paper we present a generalization of popular linear model reduction methods, such as Lanczos- and Arnoldi-based algorithms based on rational approximation, to systems whose response to interesting external inputs can be described by a few ter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1f8c0326725bffb5b772caa2e9df6008
https://doi.org/10.1145/337292.337382
https://doi.org/10.1145/337292.337382