Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Chan-Ho Kye"'
Autor:
Chan-Ho Kye, Jihee Kim, Kyungmin Baek, Kahyun Kim, Sangjin Pack, Changwon Jung, Deog-Kyoon Jeong
Publikováno v:
2022 IEEE Asian Solid-State Circuits Conference (A-SSCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b8be4e526042a78448d3e1bf8b5c0e3
https://doi.org/10.1109/a-sscc56115.2022.9980646
https://doi.org/10.1109/a-sscc56115.2022.9980646
Autor:
Jaekwang Yun, Han-Gon Ko, Deog-Kyoon Jeong, Soyeong Shin, Chan-Ho Kye, Hae-Kang Jung, Suhwan Kim, Sang Yoon Lee, Doobock Lee
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 67:1814-1818
This brief presents a power- and area-efficient forwarded-clock (FC) receiver with a delay-locked loop (DLL)-based self-tracking loop for unmatched memory interfaces. In the proposed FC receiver, the self-tracking loop is composed of two-stage cascad
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dcbfcb831d99b091cdb2f727eb83a3c3
https://doi.org/10.1109/tcsii.2019.2957042
https://doi.org/10.1109/tcsii.2019.2957042
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28:1099-1106
This article presents an energy-efficient voltage-mode transmitter with an unsegmented output driver that equalizes channel loss in the time domain based on the phase delay analysis. By modulating the phase of the transmitting clock rather than the s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c35b1bae9dad9863249fff30636f5652
https://doi.org/10.1109/tvlsi.2020.2965565
https://doi.org/10.1109/tvlsi.2020.2965565
Publikováno v:
Electronics Letters. 56:426-428
A balancing scheme for phase current and voltage of the flying capacitor in a fully integrated multi-level multi-phase DC-DC converter is proposed. The proposed balancing scheme based on the ripple voltage of the flying capacitor can simultaneously m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44deb3d5998be5fab5f474614d71e24c
https://doi.org/10.1049/el.2019.3938
https://doi.org/10.1049/el.2019.3938
Autor:
Suhwan Kim, Soyeong Shin, Sang Yoon Lee, Doobock Lee, Jaekwang Yun, Han-Gon Ko, Chan-Ho Kye, Deog-Kyoon Jeong, Hae-Kang Jung
Publikováno v:
VLSI Circuits
This paper presents a data (DQ) receiver for HBM3 with a self-tracking loop that tracks a phase skew between DQ and data strobe (DQS) due to a voltage or thermal drift. The self-tracking loop achieves low power and small area by utilizing an analog-a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4dbda1ab4910b452476f04dba88d8f8f
https://doi.org/10.23919/vlsic.2019.8778082
https://doi.org/10.23919/vlsic.2019.8778082
Publikováno v:
ISSCC
Achieving a fast-transient response is a major challenge when designing a switching regulator for a processor. Furthermore, high-frequency operation with small passive devices and robust control with a small area footprint in a CMOS-logic process are
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1efbda150a06be4ddd959fe75591b8e8
https://doi.org/10.1109/isscc.2019.8662453
https://doi.org/10.1109/isscc.2019.8662453
Publikováno v:
2018 International Conference on Electronics, Information, and Communication (ICEIC).
This paper presents a 16-Gb/s clock and data recovery circuit incorporates injection-locking technique to achieve high-speed operation with low power. The proposed receiver achieves fast locking and low power. This circuit achieves CDR bandwidth of22
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dbd849f0229ff95b107ca81ca5ce14cd
https://doi.org/10.23919/elinfocom.2018.8330664
https://doi.org/10.23919/elinfocom.2018.8330664
Publikováno v:
Electronics Letters (Wiley-Blackwell). 4/30/2020, Vol. 56 Issue 9, p426-428. 3p.