Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Chan Yuan Hu"'
Autor:
Chan-Yuan Hu, Antonio Corradi, Luke Lin, Kyoyeon Cho, Wenzhan Zhou, Leon Liang, Vivek Kumar Jain, Stefan Hunsche, Jun Zhu, Robbin Zhu, Zhang Yu, Fang Wei, Lei Liu, Kuo-Feng Pao, Selena Chen, Abdalmohsen Elmalk, Sudharshanan Raghunathan
Publikováno v:
Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV.
Edge placement error (EPE) analysis, which combines pattern variation data from single litho-process steps with overlay data from subsequent litho-process steps, has been well established as a key methodology to characterize the performance of comple
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cc640e7b2b22e02be3b602687c15e425
https://doi.org/10.1117/12.2584654
https://doi.org/10.1117/12.2584654
Autor:
Hongmei Hu, Chan Yuan Hu, Wei Yuan, Hung Wen Chao, Xiang Peng, Yu Zhang, Lu Yifei, Wenzhan Zhou
Publikováno v:
Journal of Microelectronic Manufacturing, Vol 3, Iss 1 (2020)
As the IC manufacturing enter sub 20nm tech nodes, DFM become more and more important to make sure more stable yield and lower cost. However, by introducing newly designed hardware (1980i etc.) process chemical (NTD) and Control Algorithm (Focus APC)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::22383c8c3bd5ec129e75c3900b2cbe17
https://doi.org/10.33079/jomm.20030101
https://doi.org/10.33079/jomm.20030101
Autor:
Hung-Wen Chao, QiXin Xu, Zhang Yu, Ao Chen, Wenzhan Zhou, Chan-Yuan Hu, Quan Gan, Gen-Sheng Gao
Publikováno v:
Design-Process-Technology Co-optimization for Manufacturability XIV.
As the IC manufacturing enter sub 20nm tech nodes, DFM become more and more important to make sure more stable yield and lower cost. However, by introducing newly designed hardware (1980i etc) process chemical (NTD) and Control Algorithm (Focus APC)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::175be8c975d5bd82bef52f568c2e9957
https://doi.org/10.1117/12.2551670
https://doi.org/10.1117/12.2551670
Autor:
Wenzhan Zhou, Jhen-Cyuan Li, Yen-Chan Chiu, Chun-Han Liu, Ran-Fu Yang, Chan-Yuan Hu, Cheng-Zhang Wu, Zhang Yu, Pei Liu, Hung-Wen Chao, Chi-Hung Wang, Yujie Xu
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXIV.
In the 14nm FinFET(Fin-shaped Field-Effect Transistor) node, SADP(Self-Aligned Double Patterning) technology has been introduced to produce Fin because of the exposure limit of 193nm DUV immersion lithography. As is known to all, pitch walking issue
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5bf98af9b8b347bc60408dc617aa38ac
https://doi.org/10.1117/12.2552057
https://doi.org/10.1117/12.2552057
Publikováno v:
Solid-State Electronics. 54:564-567
At sub-40 nm CMOS technology nodes, the implementation of shallow trench isolation (STI) becomes more challenging due to shrinking geometries and stricter device leakage requirements. As device geometries are shrinking, STI liner is also becoming thi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::912ca57879bd876a657ee14ef92f4227
https://doi.org/10.1016/j.sse.2010.01.019
https://doi.org/10.1016/j.sse.2010.01.019
Publikováno v:
IEEE Transactions on Electron Devices. 57:956-959
An incremental poly etching method can improve the poly pimple defect-induced device mismatch on the static noise margin (SNM) of 65-nm-node low-power 6T-SRAM. The improvement on circuit level is examined by the yield of scan chain and memory built-i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a21e1e49386a9dffa3a394f07db7cd03
https://doi.org/10.1109/ted.2010.2041285
https://doi.org/10.1109/ted.2010.2041285
Autor:
Kay Ming Lee, Chan Yuan Hu, Shih Ming Wang, Chih Ping Lee, Shoou-Jinn Chang, S. C. Chen, Jone F. Chen
Publikováno v:
Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 28:391-397
Shallow trench isolation (STI) induced mechanical stress affects the device behavior in the advanced complementary metal oxide semiconductor (CMOS) technology. This article presents how to use an optimal STI process to reduce transistor mismatch and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e57439b643598342dbe3abd3be363a55
https://doi.org/10.1116/1.3359612
https://doi.org/10.1116/1.3359612
Publikováno v:
2009 International Semiconductor Device Research Symposium.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::df13e7edbe6fa7cf2c0436de773c1036
https://doi.org/10.1109/isdrs.2009.5378057
https://doi.org/10.1109/isdrs.2009.5378057
Publikováno v:
2006 IEEE International Integrated Reliability Workshop Final Report.
Interface defect density on 90 nm PFET ultra-thin gate dielectric is checked by using a near flat band SILC in this work. Although power-law model has been successfully adopted to explain the gate oxide breakdown phenomenon below 2.0nm in industry fi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::27cb6ad002c23b252d66221b5bf31ee9
https://doi.org/10.1109/irws.2006.305240
https://doi.org/10.1109/irws.2006.305240
Autor:
Chan-Yuan Hu, 胡展源
94
The 3D object modelling becomes more and more popular with the extensive application of 3D model in movies, VRML, drawings etc.. On the other hand, the use of internet facilitates the transfer of 3D object data. There raise the copyright prob
The 3D object modelling becomes more and more popular with the extensive application of 3D model in movies, VRML, drawings etc.. On the other hand, the use of internet facilitates the transfer of 3D object data. There raise the copyright prob
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/07347430350166456329
