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pro vyhledávání: '"Cen, Yuanjun"'
Akademický článek
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Publikováno v:
2021 International Conference on Neural Networks, Information and Communication Engineering.
Akademický článek
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Autor:
Fan, Hu, Zhang, Jiayi, Cai, Jingwei, Feng, Quanyuan, Li, Dagang, Zhang, Kelin, Cen, Yuanjun, Heidari, Hadi
This paper presents circuit design considerations of high resolution data converters applied for industrial technology, some important design issues related to filter in analog-to-digital converters (ADCs) are discussed. Whole design flow about filte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=core_ac_uk__::015e8ce99ad8655765d2058098c2b2ea
https://eprints.gla.ac.uk/185170/7/185170.pdf
https://eprints.gla.ac.uk/185170/7/185170.pdf
Publikováno v:
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM).
Sometimes, the high-resolution A/D or D/A converter all need a high precision reference, the voltage of reference will determine the precision of the conversion result. In whole system, it always requires that the conversion result should be in a spe
Publikováno v:
2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM).
Sometimes, the input-port of A/D converter always needs a S/H switch. In Sample state, the S/H switch should always be opening, now voltages between input-port and output-port in S/H switch are always the same. In Hold state, the S/H switch should al
Publikováno v:
2018 IEEE 18th International Conference on Communication Technology (ICCT).
In SAR ADC, the capacitance array is a very important unit, it will determine the conversion performance in whole ADC. In L-bit SAR ADC, the resolution of the capacitance array must should be larger than L-bit. For getting a smaller layout area, the
Publikováno v:
2018 IEEE 18th International Conference on Communication Technology (ICCT).
In SAR ADC, the capacitance array is a very important unit, it will determine the conversion performance in whole ADC. In 12-bit SAR ADC, the matching precision of the capacitor array must should be larger than 12-bit. But in normal semiconductor fou
Autor:
Fan, Hua, Yang, Jingxuan, Maloberti, Franco, Feng, Quanyuan, Li, Dagang, Hu, Daqian, Cen, Yuanjun, Heidari, Hadi
This paper presents design considerations for high-resolution and high-linearity ADCs for biomedical imaging ap-plications. The work discusses how to improve dynamic spec-ifications such as Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=core_ac_uk__::4c6c44a06ee82aa8c964956f3ab52197
https://eprints.gla.ac.uk/153876/7/153876.pdf
https://eprints.gla.ac.uk/153876/7/153876.pdf
Autor:
Fan, Hua, Yang, Jingxuan, Maloberti, Franco, Feng, Quanyuan, Li, Dagang, Hu, Daqian, Cen, Yuanjun, Heidari, Hadi
This paper presents capacitive array optimization technique to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for smart senso
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=core_ac_uk__::50467542bc34d20be1728b8e07d7214c
https://eprints.gla.ac.uk/156204/13/156204.pdf
https://eprints.gla.ac.uk/156204/13/156204.pdf