A high-linearity design for rail-to-rail fully differential current conveyors.

Autor: Caviglia, S., Gastaldo, P., Zunino, R., Caviglia, D. D.

Publikováno v: 2014 21st IEEE International Conference on Electronics, Circuits & Systems (ICECS); 2014, p550-553, 4p

A current-mode two-quadrant multiplier for analogue array-based neural systems.

Autor: Bo, G. M., Caviglia, D. D., Valle, M.

Publikováno v: International Journal of Electronics. Apr2000, Vol. 87 Issue 4, p407-411. 5p.

Analysis of the behavior of a dynamic latch comparator.

Autor: Cusinato, P., Bruccoleri, M., Caviglia, D. D., Valle, M.

Publikováno v: IEEE Transactions on Circuits & Systems Part I: Fundamental Theory & Applications; Mar98, Vol. 45 Issue 3, p294, 5p, 4 Diagrams, 2 Graphs

Neural algorithms on VLSI concurrent architectures

Autor: Caviglia, D. D., Bisio, G. M., Parodi, G.

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::612502fe131a7833a422efbbefed9557
https://hdl.handle.net/11567/1102750

A NEURAL ARCHITECTURAL MODEL OF SIMPLE AND COMPLEX CORTICAL-CELLS

Autor: Luigi Raffo, Bisio, G. M., Caviglia, D. D., Indiveri, G., Sabatini, S. P.

Publikováno v: Web of Science
ResearcherID

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::25c4292128c174ea0f836b6285ac7476
https://publons.com/wos-op/publon/4875392/