Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Catherine G. Wong"'
Publikováno v:
IEEE Design & Test of Computers. 20:9-17
We trace the evolution of Caltech asynchronous processors from a simple proof of concept, to a high-performance MIPS-like processor using a different buffer circuit for better performance, to the latest 8051 clone targeting low-energy operation. We d
Autor:
Andrea Tura, E. Ou, J.T. Tong, Papadantonakis Karl S, Paul I. Pénzes, Jim Pugh, Jonathan Chang, Catherine G. Wong, Alain J. Martin, K.S. Ko, Benjamin N. Lee, P. Prakash, Mika Nyström, Eino-Ville Talvala
Publikováno v:
ASYNC
We describe the Lutonium, an asynchronous 8051 microcontroller designed for low Et/sup 2/. In 0.18 /spl mu/m CMOS, at nominal 1.8 V, we expect a performance of 0.5 nJ per instruction at 200 MIPS. At 0.5 V, we expect 4 MIPS and 40 pJ/instruction, corr
The objective of this Phase-I study was to demonstrate the feasibility of a suite of industrial CAD tools for the design of high-performance, energy-efficient, asynchronous VLSI circuits based on the Caltech technology. Situs Logic's general strategy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4a3d0d985c406c511d0a97767856063f
https://doi.org/10.21236/ada417138
https://doi.org/10.21236/ada417138
Autor:
Catherine G. Wong, Alain J. Martin
Publikováno v:
DAC
We present a method for decomposing a high-level program description of a circuit into a system of concurrent modules that can each be implemented as asynchronous pre-charge half-buffer pipeline stages (the circuits used in the asynchronous R3000 MIP