Zobrazeno 1 - 10
of 71
pro vyhledávání: '"Carlton M. Osburn"'
Autor:
Carlton M. Osburn, Mehmet C. Öztürk, Gerald Lucovsky, Jay Hauser, I. De, K. F. Yee, C. H. Lee, Z. J. Luo, I. Kim, S. J. Lee, S. Gannavaram, Wenjuan Zhu, S. K. Han, T. P. Ma, D.-L. Kwong
Publikováno v:
IBM Journal of Research and Development. 46:299-315
The vertical scaling requirements for gate stacks and for shallow extension junctions are reviewed. For gate stacks, considerable progress has been made in optimizing oxide/nitride and oxynitride dielectrics to reduce boron penetration and dielectric
Publikováno v:
Solid-State Electronics. 44:1077-1080
The optimal gate electrode workfunction was determined for the 50 nm technology node using a simulation strategy that takes into account the impact of short-channel effects on device performance in uniformly doped and super-steep-retrograde doped cha
Autor:
I. De, Carlton M. Osburn
Publikováno v:
IEEE Transactions on Electron Devices. 46:1711-1717
Super-steep retrograded (SSR) channels were compared to uniformly doped (UD) channels as devices are scaled down from 250 nm to the 50 nm technology node, according to the scheme targeted by the National Technology Roadmap for Semiconductors (1997).
Autor:
Carlton M. Osburn, K. R. Bellur
Publikováno v:
Thin Solid Films. 332:428-436
Analysis of the components of parasitic series resistance in ULSI devices shows that interfacial contact resistivities less than 10 −7 Ω cm 2 will be required for sub 100-nm ULSI devices in order to stay on the historical performance trend. With d
Autor:
Jie J. Sun, Carlton M. Osburn
Publikováno v:
IEEE Transactions on Electron Devices. 45:1377-1380
Deep submicron elevated source/drain (S/D) MOSFET's with epi facets, without facets, and with a second sidewall spacer covering the facets were studied using two-dimensional (2-D) process and device simulations. A slight degradation of drain-induced-
Autor:
A. Srivastava, R. Westhoff, Carlton M. Osburn, R. F. Bartholomew, N. A. Masnari, J. Sun, K. R. Bellur
Publikováno v:
Journal of The Electrochemical Society. 145:2131-2137
Device drive current, parasitic resistance, and junction leakage current have been studied using silicided and non-silicided deep submicron elevated source/drain (ESD) n-channel metal oxide semiconductor field effect transistors (NMOSFETs). This stud
Autor:
N. A. Masnari, R. F. Bartholomew, J. Sun, A. Srivastava, R. Westhoff, Carlton M. Osburn, K. R. Bellur
Publikováno v:
Journal of The Electrochemical Society. 144:3659-3664
Ultrashallow elevated n'/p junctions (∼75 nm) incorporating selectively deposited epitaxial silicon layers were fabricated. The undoped epi layers (∼100 nm) were deposited on exposed diffusion areas in an Advanced Semiconductor Material Epsilon I
Publikováno v:
Thin Solid Films. :562-569
11B+ and 49BF2+ implants on a Varian VIISion-80 PLUS Ion Implanter from 2.0 to 8.9 keV at a dose of 1E15/cm2, and at various controlled and measured (in situ) peak beam-current densities, ranging from 3 to 600 μA/cm2, were investigated to study the
Autor:
Kevin X. Zhang, Carlton M. Osburn
Publikováno v:
Solid-State Electronics. 41:619-625
High performance MOSFETs having effective channel lengths of 0.18 ± 0.06 μm were individually optimized and fabricated with four different gate dielectrics, including Furnace, rapid thermal oxides (RTO), rapid thermal chemical vapor deposited (RTCV
Publikováno v:
IEEE Transactions on Electron Devices. 44:1491-1498
Deep submicron NMOSFETs with elevated source/drain (ESD) were fabricated using self-aligned selective epitaxial deposition and engineered ion implanted profiles in the elevated layers, Deeper source/drain (S/D) junctions give rise to improved drive c