Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Carlos Tadeo Ortega Otero"'
Autor:
Peter J. Carlson, Michael DeBole, John V. Arthur, Myron D. Flickner, Scott Lekuch, Jeffrey L. McKinstry, Andrew S. Cassidy, Michael Mastro, Jeff Kusnitz, Brian Taba, Carmelo di Nolfo, Rathinakumar Appuswamy, Jun Sawada, Steven K. Esser, Pallab Datta, Brent Paulovicks, Klamo Jennifer, Kai Schleupen, Kevin L. Holland, Arnon Amir, Guillaume J. Garreau, Filipp Akopyan, Dharmendra S. Modha, Benjamin G. Shaw, Alexander Andreopoulos, Tapan K. Nayak, Carlos Tadeo Ortega Otero, William P. Risk
Publikováno v:
Computer. 52:20-29
IBM's brain-inspired processor is a massively parallel neural network inference engine containing 1 million spiking neurons and 256 million low-precision synapses. Now, after a decade of fundamental research spanning neuroscience, architecture, chips
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::49b898399142d35f409e1c3c3bdb2c8b
https://doi.org/10.1109/mc.2019.2903009
https://doi.org/10.1109/mc.2019.2903009
Publikováno v:
ASYNC
Asynchronous circuits offer promise in handling current and future technology scaling challenges. Unfortunately, their impact has been limited by the lack of design automation. We present A-NTUPLACE, a timing-driven placer uniquely suited to handling
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f39622589d6ff50d5f9ce841350ba4ec
https://doi.org/10.1109/async.2015.16
https://doi.org/10.1109/async.2015.16
Publikováno v:
HOST
We present split-cellTK, a tool that automates the obfuscation of split-foundry layout, in which an untrusted foundry fabricates the devices (FEOL) and a trusted foundry completes the design with metalization (BEOL). split-cellTK does not alter the d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da59fc3845b2d914ad9883e68066ac01
https://doi.org/10.1109/hst.2015.7140237
https://doi.org/10.1109/hst.2015.7140237
Publikováno v:
ASYNC
Wireless Sensor Networks (WSNs) present a challenging design space for encryption algorithms. We evaluate hardware, software, and hybrid implementations, including one of our own design, of Advanced Encryption Standard (AES) encryption engines in the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::22026f539ebe2e83e17f5e981fe1d1c7
https://doi.org/10.1109/async.2015.21
https://doi.org/10.1109/async.2015.21
Publikováno v:
ISQED
We present the architecture of and measured results for ULSNAP: a fully-implemented ultra-low power event-driven microcontroller targeted at the bursty workloads of the sensor network application space. ULSNAP is event-driven at both the microarchite
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0aa8bcdb1721ba2b896fb3bec9a98941
https://doi.org/10.1109/isqed.2014.6783391
https://doi.org/10.1109/isqed.2014.6783391
Publikováno v:
CICC
We present the first published measurements of a complex digital integrated circuit fabricated in both standard and split-foundry processes. Our 1.3-million-transistor asynchronous FPGA operates at over 300MHz in 130nm. We discuss the challenges inhe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3d9e9161b51bd8a7d14b8bbce6c300fc
https://doi.org/10.1109/cicc.2013.6658536
https://doi.org/10.1109/cicc.2013.6658536
Publikováno v:
ASYNC
Asynchronous circuits are an attractive option to overcome many challenges currently faced by chip designers, such as increased process variation. However, the lack of CAD tools to generate asynchronous circuits limits the adoption of this promising
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9e5d9e5781a6326f21c81da711f03468
https://doi.org/10.1109/async.2013.27
https://doi.org/10.1109/async.2013.27
Publikováno v:
CICC
In recent years, there has been a trend among digital and analog circuit designers towards three-dimensional integration. There has been some debate regarding the applicability of 3-D technology to general logic circuits, especially with regard to th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0cb6df26e029f0f6bc71940324a150a8
https://doi.org/10.1109/cicc.2008.4672172
https://doi.org/10.1109/cicc.2008.4672172
Autor:
W.R. Davis, Paul D. Franzon, Michael B. Steer, T. R. Harris, Rajit Manohar, C.E. Christoffersen, S. R. Dooley, Carlos Tadeo Ortega Otero, N. M. Kriplani, Samson Melamed, Shivam Priyadarshi
Publikováno v:
IET Circuits, Devices & Systems. 6:35
Physics-based compact electrothermal macromodels of standard cells are developed for fast dynamic simulation of three-dimensional integrated circuits (3DICs). Such circuits can have high thermal densities and thermal effects often limit their perform
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::95f2c32b99b5e2d5874035d35cbeef8f
https://doi.org/10.1049/iet-cds.2011.0061
https://doi.org/10.1049/iet-cds.2011.0061