Zobrazeno 1 - 10
of 33
pro vyhledávání: '"Carlos Alberto dos Reis Filho"'
Publikováno v:
Semina: Ciências Exatas e Tecnológicas, Vol 26, Iss 2, Pp 145-154 (2005)
A CMOS instrumentation circuit implemented in 0,6mm technology intended for to be used as a signal conditioner applied to the MAGFET split-drain magnetic field sensor transistor is proposed. The circuit features a high gain structure and should be op
Externí odkaz:
https://doaj.org/article/54d5adfda280407b8be4845693f55049
Publikováno v:
Semina: Ciências Exatas e Tecnológicas, Vol 26, Iss 1, Pp 51-58 (2005)
An implementation in CMOS technology of a Floating-Gate Analog Memory Cell and Programming Environment is presented. A digital closed-loop control compares a reference value set by user and the memory output and after cycling, the memory output is up
Externí odkaz:
https://doaj.org/article/593bb0834d354098aa184f53a443d4b8
Publikováno v:
Semina: Ciências Exatas e Tecnológicas, Vol 26, Iss 2 (2005)
Um circuito de instrumentação foi integrado em tecnologia de 0,6mm para ser utilizado como amplificador e condicionador de sinal produzido pelo sensor de campo magnético CMOS MAGFET do tipo splitdrain. O circuito emprega uma estrutura de alto ganh
Externí odkaz:
https://doaj.org/article/22f777b67912402eb4b19d06dd746bb3
Publikováno v:
Semina: Ciências Exatas e Tecnológicas, Vol 26, Iss 1 (2005)
Um ambiente de programação desenvolvido em VHDL para células de memória analógicas do tipo CMOS Floating-Gates é apresentado. Uma malha de controle digital compara o alvo pré-ajustado pelo usuário com o estado atual do Floating-Gate e atravé
Externí odkaz:
https://doaj.org/article/3f21ba9fdcf946c4acd0961ecc2bf6d0
Autor:
Thiago Brito Bezerra, Carlos Augusto de Moraes Cruz, Carlos Alberto dos Reis Filho, Davies William de Lima Monteiro, Luciano Lourenco Furtado da Silva
Publikováno v:
Journal of Integrated Circuits and Systems. 10:65-73
Charge pump circuits operating at voltage levels above that of the power supply usually suffer from gate-oxide voltage overstress. Such reliability problem has become a concern especially as the gate-oxide thickness is scaled down. Devising charge pu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::36d92fff0efac2587746d38a58511e18
https://doi.org/10.29292/jics.v10i2.407
https://doi.org/10.29292/jics.v10i2.407
Publikováno v:
Analog Integrated Circuits and Signal Processing. 73:885-894
A preamplifier based on the source-follower direct injection (SFDI) topology for use in read-out integrated circuits (ROIC) of quantum-well infrared photodetectors focal plane arrays (QWIP-FPA) is demonstrated. The fabricated circuit shows high linea
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d0dbf6102fcfa00f19d1a8e6af498951
https://doi.org/10.1007/s10470-012-9912-x
https://doi.org/10.1007/s10470-012-9912-x
Publikováno v:
Eletrônica de Potência. 11:233-238
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b75ebdd5019aa6c088b00957ea4c09a8
https://doi.org/10.18618/rep.2006.3.233238
https://doi.org/10.18618/rep.2006.3.233238
Autor:
Carlos Alberto dos Reis Filho, Davies William de Lima Monteiro, Carlos Augusto de Moraes Cruz
Publikováno v:
SBCCI
Reliability problems such as gate-oxide voltage overstress have become a concern for CMOS circuits as the gate-oxide thickness is scaled down. Gate-oxide overstress is particularly worse for charge pump circuits because they usually operate in high v
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea7780e0e83c1c7efce5e8aa1e119345
https://doi.org/10.1145/2660540.2660976
https://doi.org/10.1145/2660540.2660976
Publikováno v:
VLSI-SoC
An analysis of a cascode source-follower with all transistors operating in saturation mode is presented. The new structure provides means to mitigate the effects of nonlinearities caused by transistor capacitances. It is also studied the effects of a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::85afe10b16c2d8b4077965d38d2766d7
https://doi.org/10.1109/vlsisoc.2011.6081655
https://doi.org/10.1109/vlsisoc.2011.6081655
Publikováno v:
SBCCI
In this paper an open-loop CMOS voltage buffer is unveiled which features less than -60dB THD within a bandwidth of 100MHz and large-signal gain that departs from unity a maximum of 1.6% within the band. Design methodology and proof-of-concept simula
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eaa052a2bd1bc3330f8e35f61929a52d
https://doi.org/10.1145/1854153.1854164
https://doi.org/10.1145/1854153.1854164