Zobrazeno 1 - 10
of 30
pro vyhledávání: '"Camillo Stefanucci"'
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 6, Pp 987-995 (2018)
Modeling photoelectric effects in semiconductors with electrical simulators is demonstrated in typical 1-D and 2-D architectures. The concept is based on a coarse meshing of the semiconductor with the so-called generalized lumped devices, where equiv
Externí odkaz:
https://doaj.org/article/c83e56f2ae09423294ad7748de36febb
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 6, Pp 987-995 (2018)
Modeling photoelectric effects in semiconductors with electrical simulators is demonstrated in typical 1-D and 2-D architectures. The concept is based on a coarse meshing of the semiconductor with the so-called generalized lumped devices, where equiv
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4d30621cf9db8ccdd1e965b69b9dc191
https://doi.org/10.1109/jeds.2018.2817286
https://doi.org/10.1109/jeds.2018.2817286
Autor:
Maher Kayal, Pietro Buccella, Yasser Moursy, Jean-Michel Sallese, Hao Zou, Ramy Iskander, Camillo Stefanucci
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 35:1489-1502
A 3-D simulation of substrate currents is crucial to analyze parasitic coupling effects due to minority carrier injection in smart power ICs. In this paper, a substrate parasitic extraction methodology is introduced by dividing the IC layout into ele
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::590c78774a8a0a71821cbfca2c0aed35
https://doi.org/10.1109/tcad.2015.2513008
https://doi.org/10.1109/tcad.2015.2513008
Publikováno v:
NEWCAS
We present a lumped devices network approach to simulate surface recombination effects in optoelectronics devices. The network is composed of generalized lumped devices where the excess carrier concentrations and gradients are mapped on electrical qu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cff948039da0390a7dd1245f65a53e39
https://doi.org/10.1109/newcas.2018.8585606
https://doi.org/10.1109/newcas.2018.8585606
Publikováno v:
Analog Circuits and Signal Processing ISBN: 9783319743813
The EPFL substrate lumped device models have been coded in VerilogA and validated by comparison with TCAD simulations. The choice of VerilogA implementation allows to simulate the model in standard circuit simulators as the Cadence Spectre used in th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::41edab498c771905268e9f9bccb41e9e
https://doi.org/10.1007/978-3-319-74382-0_4
https://doi.org/10.1007/978-3-319-74382-0_4
Publikováno v:
Analog Circuits and Signal Processing ISBN: 9783319743813
Parasitic substrate currents are strongly related to the propagation of minority carriers inside the chip. Modeling these phenomena requires analytical solutions of transport equations that are available only in the low-current regime. In HV integrat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c2c9ba279bb8206f8eb5806d18befdf9
https://doi.org/10.1007/978-3-319-74382-0_3
https://doi.org/10.1007/978-3-319-74382-0_3
Publikováno v:
Analog Circuits and Signal Processing ISBN: 9783319743813
This chapter presents a tool to extract the model of the substrate for arbitrary integrated circuit layouts. The core extraction algorithm is based on the subdivision of the substrate into a user-specified number of optimized rectilinear grid cells.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::670caaf9e4756e00091db86fda470e8b
https://doi.org/10.1007/978-3-319-74382-0_5
https://doi.org/10.1007/978-3-319-74382-0_5
Publikováno v:
Analog Circuits and Signal Processing ISBN: 9783319743813
In this chapter, the EPFL substrate model is used to analyze substrate parasitic couplings in high-voltage ICs. With this analysis, circuit performance under substrate current is quickly estimated with SPICE simulations enabling the design of appropr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4b3c7fc3a32f51edff22e98182bc9c53
https://doi.org/10.1007/978-3-319-74382-0_7
https://doi.org/10.1007/978-3-319-74382-0_7
Publikováno v:
Analog Circuits and Signal Processing ISBN: 9783319743813
Major issues related to the parasitic substrate current in integrated circuits and related engineering solutions are introduced in this chapter. The main cause for electrical couplings taking place in the substrate has been attributed to the activati
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::57a0eef76a108b4371d932f8137e4c2b
https://doi.org/10.1007/978-3-319-74382-0_1
https://doi.org/10.1007/978-3-319-74382-0_1
Publikováno v:
Analog Circuits and Signal Processing ISBN: 9783319743813
This chapter discusses the validation of the EPFL substrate model against experimental data of parasitic couplings measured from specific test circuits fabricated in a HV-CMOS technology. The substrate model is based on a distributed network composed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::920a43dcb026f374a685c7c57f2ac23b
https://doi.org/10.1007/978-3-319-74382-0_6
https://doi.org/10.1007/978-3-319-74382-0_6