Zobrazeno 1 - 10
of 44
pro vyhledávání: '"Cache interference"'
Publikováno v:
IEEE Access, Vol 10, Pp 93799-93811 (2022)
Modern real-time embedded systems are equipped with multi-core processors to execute computationally intensive tasks. In multi-core architecture, last-level cache memory is shared by cores. The shared cache becomes a non-deterministic resource, which
Externí odkaz:
https://doaj.org/article/ca921b94d42d4b9581c9783b23c8974c
Autor:
Yoojin Lim, Hyoseung Kim
Publikováno v:
IEEE Access, Vol 7, Pp 128628-128640 (2019)
With the increasing complexity of recent autonomous platforms, there is a strong demand to better utilize system resources while satisfying stringent real-time requirements. Embedded virtualization is an appealing technology to meet this demand. It e
Externí odkaz:
https://doaj.org/article/1f09c4d946fa4002a899fe800f1cf5af
Publikováno v:
PACT
Substantial renovations in hardware cache have been focused on reducing cache interference between workloads recently. However, cache conflicts within each workload are surprisingly overlooked. The paper identifies that cache conflicts cannot be effe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::808ae997829dcaa46347c4e6f4d861bf
https://doi.org/10.1109/pact52795.2021.00027
https://doi.org/10.1109/pact52795.2021.00027
Autor:
Hyoseung Kim, Yoojin Lim
Publikováno v:
IEEE Access, Vol 7, Pp 128628-128640 (2019)
With the increasing complexity of recent autonomous platforms, there is a strong demand to better utilize system resources while satisfying stringent real-time requirements. Embedded virtualization is an appealing technology to meet this demand. It e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a300e2eb9de2fe4be2a90f30252c4e21
https://doi.org/10.1109/access.2019.2939859
https://doi.org/10.1109/access.2019.2939859
There exists a divide between the ever-increasing demand for high-performance embedded systems and the availability of practical methodologies to understand the interplay of complex data-intensive applications with hardware memory resources. On the o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a97060d18a0b49b5de3313ef22381f5
Autor:
Satka, Zenepe, Hodžić, Hena
Since different companies are introducing new capabilities and features on their products, the demand for computing power and performance in real-time systems is increasing. To achieve higher performance, processor's manufactures have introduced mult
Externí odkaz:
http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-48542
Akademický článek
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Autor:
Russell Kegley, Jonathan Preston, Alan Charsagua, Matthew Anderson, Srini Srinivasan, Steve Drager, Nithya Srinivasan, Mark Gerhardt, Rin Ha, Richard Rosa, Rich Hilliard, Clifford Granger
Publikováno v:
2019 IEEE/AIAA 38th Digital Avionics Systems Conference (DASC).
Multicore processors offer significant advantages of weight, power, and space to embedded real-time developers, making their adoption almost inevitable. Also, system sustainability and economies of scale will increasingly make multicore devices indis
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::20b077389288e7e61413fd71a386ea2e
https://doi.org/10.1109/dasc43569.2019.9081787
https://doi.org/10.1109/dasc43569.2019.9081787
Autor:
T. Sasilatha, R. Dorothy
Current control systems and emulation systems (Hardware-in-the-Loop, HIL or Processor-in-theLoop, PIL) for high-end power-electronic applications often consist of numerous components and interlinking busses: a micro controller for communication and h
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7f29a6085855c7658e29a482765eff86
https://zenodo.org/record/4105893
https://zenodo.org/record/4105893
Akademický článek
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