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Autor:
Lima-Engelmann, Tobias
CPU cache hierarchies are the central solution in bridging the memory wall. A proper understanding of how to trade-off their high cost against performance can lead to cost-savings without sacrificing performance.Due to the combinatorial nature of the
Externí odkaz:
http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-525874
Publikováno v:
IEEE Transactions on Services Computing. 15:2910-2924
Numerous research efforts have been proposed for efficient processing of range queries in high-dimensional space by either redesigning R-tree access structure for exploring massive parallelism on single GPU or exploring distributed framework of R-tre
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::09fc40b96499173a0c7274f54e7c031c
https://doi.org/10.1109/tsc.2021.3079580
https://doi.org/10.1109/tsc.2021.3079580
Autor:
Prajwal K P Bhat, K B Ramesh
Cache is a small, high-speed buffer memory between the CPU and the primary unit is a hardware component that stores data so that future requests for the data can be served faster. Cache memory must be small so that data can be used efficiently and it
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::22c86342cdd1f08396674d31e1089a34
The memory hierarchy has a high impact on the performance and power consumption in the system. Moreover, current embedded systems, included in mobile devices, are specifically designed to run multimedia applications, which are memory intensive. This
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a1d36c740465b79b456db1bcee79a76b
http://arxiv.org/abs/2303.16074
http://arxiv.org/abs/2303.16074
Nowadays, embedded systems are provided with cache memories that are large enough to influence in both performance and energy consumption as never occurred before in this kind of systems. In addition, the cache memory system has been identified as a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2ae0998aba5aa993e354e091bb3ce83d
http://arxiv.org/abs/2303.03338
http://arxiv.org/abs/2303.03338
Autor:
Emanuele Parrinello, Seyed Pooya Shariatpanahi, Mohammad Javad Salehi, Petros Elia, Antti Tolli
Publikováno v:
IEEE Transactions on Wireless Communications
Multi-antenna coded caching is known to combine a global caching gain that is proportional to the cumulative cache size found across the network, with an additional spatial multiplexing gain that stems from using multiple transmitting antennas. Howev
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ffa990d50beb6cc99187ae5ca14bfd03
https://doi.org/10.1109/twc.2021.3119772
https://doi.org/10.1109/twc.2021.3119772
Publikováno v:
IEEE Internet of Things Journal. 9:5799-5811
The Internet of Vehicles (IoV) can offer safe and comfortable driving experience, by the enhanced advantages of space-air-ground integrated networks (SAGINs), i.e., global seamless access, wide-area coverage and flexible traffic scheduling. However,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44ff2144eef0a719a5d42929826d8db6
https://doi.org/10.1109/jiot.2021.3065664
https://doi.org/10.1109/jiot.2021.3065664
Publikováno v:
IEEE Transactions on Computers. 71:947-958
FeFET is a promising technology for non-volatile on-chip memories. It is rapidly attracting an ever-increasing attention from industry. The advantage of FeFETs is full compatibility with the existing CMOS process beside their low power consumption. T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b76764d3fd6f32daecf21e3140634efc
https://doi.org/10.1109/tc.2021.3066899
https://doi.org/10.1109/tc.2021.3066899
Autor:
Jongsun Park, Yunho Jang
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 69:1622-1626
In this paper, we present a novel low area joint 2T spin orbit torque magnetic random access memory (SOT-MRAM) cell architecture. The proposed joint 2T cell achieves up to 15% of SOT-MRAM cell area reduction by sharing the diffusion regions of transi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f3c7fba0d23971cdc15c7a624b59fb20
https://doi.org/10.1109/tcsii.2021.3126638
https://doi.org/10.1109/tcsii.2021.3126638