Efficient bit-parallel subcircuit extraction using CUDA

Autor: Po-Yen Hung, Che Lun Hung, Chia-Shin Ou, Yuan-Hong Tseng, Chun-Yuan Lin, Ship-Peng Li, Chun-Ting Fu

Publikováno v: Concurrency and Computation: Practice and Experience. 28:4326-4338

Wafer processing technology has been improving rapidly. Moore's law has been exceeded as the number of transistors in a dense integrated circuit, now increases threefold or more, approximately every year. The integrated circuit has gone from very lar

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::0ac7c53df8dc0f173d2caa027b00c494
https://doi.org/10.1002/cpe.3732

Parallel Subcircuit Extraction Algorithm on GPGPUs

Autor: Chun Ting Fu, Chia Shin Ou, Hsiao Hsi Wang, Che Lun Hung

Publikováno v: HPCC/CSS/ICESS

Subcircuit Extraction plays an important role in Computer-Aided-Design of digital circuits. With the rapid growth of wafer processing technologies, the integration is from very large scale to giga large scale. Therefore, to extract sub circuits from

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::9934a6f8454281c23b19cdc41f1b63e3
https://doi.org/10.1109/hpcc.2014.202

An Encoded Matrix Algorithm for Subcircuit Extraction Problem

Autor: Chia-Shin Ou, 歐家欣

95
Subcircuit extraction problem is to find all occurrences of a pattern circuit in a larger main circuit. It is an important topic in many areas of VLSI circuit design. For example, recognition of logic gates in a large circuit can be used to s

Externí odkaz: http://ndltd.ncl.edu.tw/handle/50061845878458014650

Parallel Subcircuit Extraction Algorithm on GPGPUs.

Autor: Hung, Che Lun, Wang, Hsiao Hsi, Fu, Chun Ting, Ou, Chia Shin

Publikováno v: 2014 IEEE Intl Conf on High Performance Computing & Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety & Security, 2014 IEEE 11th Intl Conf on Embedded Software & Syst (HPCC,CSS,ICESS); 2014, p1248-1252, 5p

A netlist pruning tool for an electronic system prototyping platform.

Autor: Baratli, Karim, Lakhssassi, Ahmed, Blaquiere, Yves, Savaria, Yvon

Publikováno v: 2013 IEEE 11th International New Circuits & Systems Conference (NEWCAS); 2013, p1-4, 4p